MRF24XA_15 Datasheet, PDF (180/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

MRF24XA
6.8 Security Examples
This section provides examples for Proprietary mode
framing.
6.8.1 MAC LAYER SECURITY EXAMPLE 1
• Network Configuration: Address size is 8 bytes
• Source address: 0x0807060504030201, where
LSB (0x01) is at address 0x1F
• Destination address: 0x9897969594939291
• Payload: BA BA
• MAC security level: 0x04
• MAC security indices: Only encode from the sec-
ond payload
• Packet: Data packet
6.8.1.1 Transmission
1. Host MCU constructs the frame and loads the
buffer:
15 || C9 55 91 92 93 94 95 96 97 98 01 02 03 04
05 06 07 08 || 54 || BA BA
2. —
3. —
4. —
5. —
6. Host MCU configures:
- SECSUITE to 0x04
- SECKEY to
0x0F0E0D0C0B0A0908070605040302010,
where LSB (0x00) is at address 0x40
- SECNONCE to
0x08070605040302015555555506, where
MSB (0x08) is at address 0x5c.
7. Host MCU sets the TXST register
8. MRF24XA configures:
- SECHDRINDX to 0x01
- SECPAYINDX to 0x15
- SECENDINDX to 0x15.
9. MRF24XA performs CCM* encryption, where
BA BA is encrypted to BA F7.
10. MRF24XA appends CRC: 0x9D0A.
11. MRF24XA transmits the packet to the medium.
Different IF is received based on the register
settings (for example, TX with CSMA).
TX Buffer (0x200) content:
17 || C9 55 91 92 93 94 95 96 97 98 01 02 03 04
05 06 07 08 || 54 || BA F7 || 0A 9D
6.8.1.2 Reception
1. MRF24XA receives the following packet through
the antenna:
17 || C9 55 91 92 93 94 95 96 97 98 01 02 03 04
05 06 07 08 || 54 || BA F7 || 0A 9D
2. MRF24XA configures:
- SECHDRINDX to 0x01
- SECPAYINDX to 0x15
- SECENDINDX to 0x15.
3. MRF24XA asserts RXIF (RXSFDIF): Packet
accepted by RX filter.
4. —
5. Host MCU configures:
- SECSUITE to 0x04
- SECKEY to
0x0F0E0D0C0B0A0908070605040302010,
where LSB (0x00) is at address 0x40
- SECNONCE to
0x08070605040302015555555506, where
MSB (0x08) is at address 0x5c.
6. Host MCU issues RXDEC.
7. MRF24XA performs CCM* decryption, where
BA F7 is decrypted to BA BA.
8. MRF24XA asserts RXDECIF (and IDLEIF).
9. —
10. —
11. —
12. —
13. —
14. —
15. —
16. SW read the entire frame from RX Buffer
(0x300):
17 || C9 55 91 92 93 94 95 96 97 98 01 02 03 04
05 06 07 08 || 54 || BA BA || 0A 9D || RSVs
DS70005023B-page 180
Preliminary
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