MRF24XA_15 Datasheet, PDF (232/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

MRF24XA
9.13.2 EXTERNAL LNA HANDLING
MRF24XA can automatically switch ON and OFF exter-
nal LNA circuit as the internal functionalities require
receiving. LNA pin is automatically set to its predefined
active state as external LNA circuit is needed, and set
back to its inactive state if LNA is not needed.
To enable external LNA handling, set LNAEN bit of the
EXTLNA register to ‘1’. EXTLNAP bit sets the active
state of LNA line. The actual value of EXTLNAP bit is
the active state of the LNA line.
MRF24XA is programmed to delay signal receiving
after powering on the external LNA circuit. It enables to
optimize the power consumption to the startup time of
the external LNA circuit. LNADLY<4:0> defines the
time delay between LNA power-up and the start of sig-
nal reception. The time base is 1 µs. Higher LNADLY
value means longer Wait before starting reception.
RFOP<2:0> field of the Radio Operation register shows
the status of the radio and external LNA.
REGISTER 9-31: OPSTATUS (OPERATION STATUS)
R-0
R/HS/HC-0 R/HS/HC-0 R/HS/HC-0 R/HS/HC-0
r
MACOP<3:0>
bit 7
R/HS/HC-0
Address: 0x02
R/HS/HC-0 R/HS/HC-0
RFOP<2:0>
bit 0
Legend: R = Readable bit W = Writable bit
-n = Value at POR
‘1’ = Bit is set
r = Reserved
HC = Hardware Clear
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
HS = Hardware Set
bit 7
bit 6-3
bit 2-0
Reserved: Maintain as ‘0’
Out of scope
RFOP <2:0>: Radio Operation Register Field bits
Provides status information on the current Radio state. Encoding on RFOP<2:0>:
111 = TX with external PA is turned on (TX+PA)
110 = RX with external LNA is turned on (RX+LNA)
101 = Synthesizer and external PA or LNA is turned on (SYNTH+PA/LNA)
DS70005023C-page 232
Preliminary
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