MRF24XA_15 Datasheet, PDF (167/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

5.8.4
802.15.4-2006 COMPLIANT FRAME
WITH NWK LAYER SECURITY
(TYPE D)
• Network Configuration: Extended address
• Source address: 0x0807060504030201, where
LSB (0x01) is at address 0x1F
• Source PANID: 0xC2C1, where LSB (0xC1) is at
address 0x29
• Destination address: 0x9897969594939291
• Destination PANID: 0xD2D1
• Network header: 41 41
• Network payload: 14 14
• Network security level: 0x06
• Frame counter: 0x55555555
• Security level: 0x07
• Packet: Command packet
5.8.4.1 Transmission
1. Host MCU constructs the frame and loads the
buffer:
20 || 09 DC 14 D1 D2 91 92 93 94 95 96 97 98
C1 C2 01 02 03 04 05 06 07 08 || 07 55 55 55 55
|| 41 41 14 14
2. Host MCU configures security materials for
NWK:
- SECSUITE register to 0x06
- SECNONCE register to 0xFDFCFB-
FAF9F8F7F6F5F4F3F2F1, where MSB
(0xFD) is at address 0x5C
- SECKEY register to
0x0F0E0D0C0B0A0908070605040302010,
where LSB (0x00) is at address 0x40
- SECHDRINDX register to 0x1D
- SECPAYINDX register to 0x1F
- SECENDINDX register to 0x20.
3. Host MCU issues TXENC.
4. MRF24XA performs CCM* authentication with
encryption, where 41 41 14 14 is encrypted to 41
41 14 DA, and the following MIC tag is attached:
53 99 39 A1 55 C5 D3 F6 MIC-TAG.
5. MRF24XA asserts TXENCIF (and IDLEIF).
6. Host MCU downloads SECKEY
0x0F0E0D0C0B0A09080706050403020100,
where LSB (0x00) is at address 0x40.
7. Host MCU clears DTSM register.
8. Host MCU issues TXST.
MRF24XA
9. MRF24XA configures:
- SECSUITE to 0x07
- SECNONCE to
0x08070605040302015555555507, where
MSB (0x08) is at address 0x5C
- SECHDRINDX to 0x01
- SECPAYINDX to 0x1D
- SECENDINDX to 0x38.
10. MRF24XA performs CCM* authentication with
encryption, where 41 41 14 DA 53 99 39 A1 55
C5 D3 F6 is encrypted to C9 87 C6 D8 7F E4 BD
A2 A4 00 89 9F, and the following MIC tag is
attached:
B4 E6 9C B1 54 7F 9B B3 4089 77 FB 93 34 E2
D6
11. MRF24XA appends CRC: 0x1AA8.
12. MRF24XA transmits the packet to the medium.
Different IF is received based on the register
settings (for example, TX with CSMA).
TX Buffer (0x200) content:
3A || 09 DC 14 D1 D2 91 92 93 94 95 96 97 98
C1 C2 01 02 03 04 05 06 07 08 || 07 55 55 55 55
|| C9 87 C6 D8 7F E4 BD A2 A4 00 89 9F B4 E6
9C B1 54 7F 9B B3 40 89 77 FB 93 34 E2 D6 ||
A8 1A
5.8.4.2 Reception
1. MRF24XA receives the following packet through
the antenna:
3A || 09 DC 14 D1 D2 91 92 93 94 95 96 97 98
C1 C2 01 02 03 04 05 06 07 08 || 07 55 55 55 55
|| C9 87 C6 D8 7F E4 BD A2 A4 00 89 9F B4 E6
9C B1 54 7F 9B B3 40 89 77 FB 93 34 E2 D6 ||
A8 1A
2. MRF24XA configures:
- SECSUITE to 0x07
- SECNONCE to
0x08070605040302015555555507, where
MSB (0x08) is at address 0x5C
- SECHDRINDX to 0x01
- SECPAYINDX to 0x1D
- SECENDINDX to 0x38.
3. MRF24XA asserts RXIF (RXSFDIF): Packet
accepted by RX filter.
4. —
5. Host MCU configures SECKEY
0xC0C1C2C3C4C5C6C7C8C9CACBCCCD-
CECF, where LSB (0xCF) is at address 0x40.
6. Host MCU issues RXDEC.
7. MRF24XA performs CCM* de-authentication
and decryption, where the MIC tag is compared
against the received one, and C9 87 C6 D8 7F
E4 BD A2 A4 00 89 9F is decrypted to 41 41 14
DA 53 99 39 A1 55 C5 D3 F6
 2015 Microchip Technology Inc.
Preliminary
DS70005023C-page 167