MRF24XA_15 Datasheet, PDF (21/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

MRF24XA
REGISTER 2-4: PIR2 (PERIPHERAL INTERRUPT REGISTER 2)
ADDRESS: 0x05
R/W/HS/HC-0 R/W/HS/HC-0 R/W/HS/HC-0 R/W/HS/HC-0 R/W/HS/HC-0 R/W/HS/HC-0 R/W/HS/HC-0 R/W/HS/HC-0
TXIF
bit 7
TXENCIF
TXMAIF
TXACKIF TXCSMAIF
TXSZIF
TXOVFIF
FRMIF
bit 0
Legend: R = Readable bit W = Writable bit
-n = Value at POR
‘1’ = Bit is set
r = Reserved
HC = Hardware Clear
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
HS = Hardware Set
bit 7
TXIF: Transmission Done Interrupt Flag bit
The current TX operation (TXST) is successfully completed. This event is unchanged when a hardware
generated ACK packet completed the transmission or when a packet is repeated. Nonpersistent,
cleared by SPI read.
bit 6
TXENCIF: Transmit Encryption Interrupt Flag bit
The TX packet is successfully encrypted or complemented, or both with a Message Integrity Code
(MIC). Set by the device after TXENC = 1, when TXENC is cleared. Nonpersistent, cleared by SPI read.
bit 5
TXMAIF: Transmitter Medium Access Interrupt Flag bit
Set by the device when the medium is accessed specifically when the first sample in the preamble is
transmitted into the air. Nonpersistent, cleared by SPI read.
bit 4
TXACKIF: Transmission Unacknowledged Failure Interrupt Flag bit
Set by the device when Acknowledge is not received after the configured maximum number of trans-
mission retries RETXMCNT<3:0>, provided that the Frame Control field of the transmitted frame
indicates AckReq = 1. Nonpersistent, cleared by SPI read.
bit 3
TXCSMAIF: Transmitter CSMA Failure Interrupt Flag bit
Set by the device when CSMA-CA finds the channel busy for BOMCNT<2:0> number of times, provided
that CSMAEN = 1 is configured. Nonpersistent, cleared by SPI read.
bit 2
TXSZIF: Transmit Packet Size Error Interrupt Flag bit
Set by the device if TX packet size (first byte of the TX buffer) is found to be zero or greater than the
maximum size that the buffer can support. Automatic size check is performed after TXST is set by the
user. Please note that the device may modify the packet length after CRC or MIC calculation. Nonper-
sistent, cleared by SPI read.
bit 1
TXOVFIF: Transmitter Overflow Interrupt Flag bit
The Host Controller attempted to write a TX buffer that was not empty (TXBUFEMPTY = 0).
Nonpersistent, cleared by SPI read.
bit 0
FRMIF: Frame Format Error Interrupt Flag bit
Set if the transmitter/receiver fails to parse the frame in the buffer (it is not as it must be or it is
corrupted in demodulation).
 2015 Microchip Technology Inc.
Preliminary
DS70005023C-page 21