MRF24XA_15 Datasheet, PDF (220/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

MRF24XA
REGISTER 9-18: SFD1 (START FRAME DELIMITER PATTERN 1 CONFIGURATION REGISTER)
ADDRESS: 0x60
R/W-00100001
SFD1<7:0>
bit 7
bit 0
Legend: R = Readable bit W = Writable bit
-n = Value at POR
‘1’ = Bit is set
r = Reserved
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
SFD1<7:0>: Start Frame Delimiter Pattern 1 Register Field bits
This octet is used as SFD pattern with 2 Mbps rate when OPTIMAL = 0, and as the MSB of the SFD
pattern with 2 Mbps rate when OPTIMAL = 1.
When OPTIMAL = 0:
The hexadecimal digits must be different from 0x0 and different from the corresponding digits in
SFD<k>, k = 2, 3, 4, 6, and the value 0xA7 is forbidden.
When OPTIMAL = 1:
The hexadecimal digits must be different from 0x0 and different from the corresponding digits of SFD2.
REGISTER 9-19: SFD2 (START FRAME DELIMITER PATTERN 2 CONFIGURATION REGISTER
ADDRESS: 0x61
R/W-11110001
SFD2<7:0>
bit 7
bit 0
Legend: R = Readable bit W = Writable bit
-n = Value at POR
‘1’ = Bit is set
r = Reserved
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
SFD2<7:0>: Start Frame Delimiter Pattern 2 Register Field bits
This octet is used as SFD pattern with 1 Mbps rate when OPTIMAL = 0, and as the MSB of the SFD
pattern with 1 Mbps rate when OPTIMAL = 1.
When OPTIMAL = 0:
The hexadecimal digits must be different from 0x0 and different from the corresponding digits in
SFD<k>, k = 1, 3, 4, 6, and the value 0xA7 is forbidden.
When OPTIMAL = 1:
The hexadecimal digits must be different from 0x0 and different from the corresponding digits of SFD1.
DS70005023C-page 220
Preliminary
 2015 Microchip Technology Inc.