MRF24XA_15 Datasheet, PDF (181/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

6.8.2 MAC LAYER SECURITY EXAMPLE 2
• Network Configuration: Address size is 8 bytes,
Inferred destination addressing
• Source address: 0x0807060504030201, where
LSB (0x01) is at address 0x1F
• Destination address: 0x9897969594939291
• Payload: BA BA
• MAC security level: 0x07
• MAC security indices: Only encode from the sec-
ond payload
• Packet: Data packet
6.8.2.1 Transmission
1. Host MCU constructs the frame and loads the
buffer:
15 || 09 55 91 92 93 94 95 96 97 98 || 34 || BA BA
Always encode Security Indices with DA present
in AUXSECHDR!
2. —
3. —
4. —
5. —
6. Host MCU configures:
- SECSUITE to 0x07
- SECKEY to
0x0F0E0D0C0B0A09080706050403020100,
where LSB (0x00) is at address 0x40
- SECNONCE
0x08070605040302015555555506, where
MSB (0x08) is at address 0x5c.
7. Host MCU issues TXST.
8. MRF24XA configures
- SECHDRINDX to 0x01
- SECPAYINDX to 0x0D
- SECENDINDX to 0x0D.
9. MRF24XA performs CCM* authentication with
encryption, where BA BA is encrypted to BA F7,
and the following MIC tag is attached:
00 11 6C 8C 59 02 66 AC 5B DC 2D 30 21 1E
D0 0C
10. MRF24XA appends CRC: 0xA2D2.
MRF24XA
11. MRF24XA transmits the packet to the medium.
Different IF is received based on the register
settings (for example, TX with CSMA). Packet
transmitted to the medium:
17 || 09 55 || 34 || BA F7 || 00 11 6C 8C 59 02 66
AC 5B DC 2D 30 21 1E D0 0C || D2 A2
TX Buffer (0x200) content:
1F || 09 55 91 92 93 94 95 96 97 98 || 34 || BA
F7 || 00 11 6C 8C 59 02 66 AC 5B DC 2D 30 21
1E D0 0C || D2 A2
6.8.2.2 Reception
1. MRF24XA receives the following packet through
the antenna:
17 || 09 55 || 34 || BA F7 || 00 11 6C 8C 59 02 66
AC 5B DC 2D 30 21 1E D0 0C || D2 A2
2. MRF24XA configures:
- SECHDRINDX to 0x01
- SECPAYINDX to 0x0D (inferred DA is
considered)
- SECENDINDX to 0x15.
3. MRF24XA asserts RXIF (RXSFDIF): Packet
accepted by RX filter.
4. —
5. Host MCU configures:
- SECSUITE to 0x07
- SECKEY to
0x0F0E0D0C0B0A09080706050403020100,
where LSB (0x00) is at address 0x40
- SECNONCE to
0x08070605040302015555555506, where
MSB (0x08) is at address 0x5c.
6. Host MCU issues RXDEC.
7. MRF24XA performs CCM* de-authentication
and decryption, where the MIC tag is compared
against the received one, and BA F7 is
decrypted to BA BA.
8. MRF24XA asserts RXDECIF (and IDLEIF).
9. —
10. —
11. —
12. —
13. —
14. —
15. SW read the entire frame from RX Buffer
(0x300):
17 || 09 55 || 34 || BA BA || 00 11 6C 8C 59 02 66
AC 5B DC 2D 30 21 1E D0 0C || D2 A2 || RSVs
 2015 Microchip Technology Inc.
Preliminary
DS70005023B-page 181