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MRF24XA_15 Datasheet, PDF (44/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF
MRF24XA
REGISTER 2-24: TMRCON (TIMER CONTROL REGISTER)
R/W-100
BOMCNT<2:0>
bit 7
ADDRESS: 0x19
R/W-00010
BASETM<4:0>
bit 0
Legend: R = Readable bit W = Writable bit
-n = Value at POR
‘1’ = Bit is set
r = Reserved
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-5
bit 4-0
BOMCNT<2:0>: CSMA-CA Back-off Maximum Count bits
The maximum number of back-off attempts the CSMA-CA algorithm attempts before declaring a chan-
nel access failure.
111 = Reserved
110 = Reserved
101 = 5 attempts
100 = 4 attempts
011 = 3 attempts
010 = 2 attempts
001 = 1 attempts
000 = 0 attempt
BASETM<4:0>: Base Time Field bits
The number of 1 µs clock cycles that a Base time unit represents in all register settings. For more infor-
mation on Base time units, see Section 4.1 “MAC Architecture”.
DS70005023C-page 44
Preliminary
 2015 Microchip Technology Inc.