MRF24XA_15 Datasheet, PDF (29/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

MRF24XA
REGISTER 2-12: GPIO (GENERAL PURPOSE I/O REGISTER)
R/W-0
R/W-1
R/W-1
R/W-1
R-0
GPIOEN TRISGPIO2 TRISGPIO1 TRISGPIO0
r
bit 7
R/W-0
GPIO2
ADDRESS: 0x0D
R/W-0
R/W-0
GPIO1
GPIO0
bit 0
Legend: R = Readable bit W = Writable bit
-n = Value at POR
‘1’ = Bit is set
r = Reserved
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
GPIOEN: GPIO Enable bit
This bit enables the GPIO’s control, if GPIOMODE is configured into Normal mode.
The other GPIOMODE Configuration automatically controls GPIO pins.
bit 6
TRISGPIO2: Tri-state Control for GPIO 2 Pin bit
If set, the pin is configured into Input mode. Value reads from GPIO2 bit.
If cleared, the pin is configured into Output mode. Value sets through the GPIO2 bit.
bit 5
TRISGPIO1: Tri-state Control for GPIO 1 Pin bit
If set, the pin is configured into Input mode. Value reads from GPIO1 bit.
If cleared, the pin is configured into Output mode. Value sets through the GPIO1 bit.
bit 4
TRISGPIO0: Tri-state Control for GPIO 0 Pin bit
If set, the pin is configured into Input mode. Value reads from GPIO0 bit.
If cleared, the pin is configured into Output mode. Value sets through the GPIO0 bit.
bit 3
Reserved: Maintain as ‘0’
bit 2
GPIO2: GPIO 2 Value bit
This bit represents the value on the GPIO 2 pin.
bit 1
GPIO1: GPIO 1 Value bit
This bit represents the value on the GPIO 1 pin.
bit 0
GPIO0: GPIO 0 Value bit
This bit represents the value on the GPIO 0 pin.
 2015 Microchip Technology Inc.
Preliminary
DS70005023C-page 29