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PIC18FXX39 Datasheet, PDF (79/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel | |||
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PIC18FXX39
REGISTER 8-9:
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
U-0
U-0
U-0
R/W-1 R/W-1 R/W-1 R/W-1
â
â
â
EEIP(1) BCLIP(1) LVDIP(1) TMR3IP(1)
bit 7
U-1
â
bit 0
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as '0'
EEIP(1): Data EEPROM/FLASH Write Operation Interrupt Priority bit
1 = High priority
0 = Low priority
BCLIP(1): Bus Collision Interrupt Priority bit
1 = High priority
0 = Low priority
LVDIP(1): Low Voltage Detect Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3IP(1): TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as â1â
Note 1: Maintain this bit cleared (= 0).
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared x = Bit is unknown
ï£ 2002-2013 Microchip Technology Inc.
Preliminary
DS30485B-page 79
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