PIC18FXX39 Datasheet, PDF (25/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

PIC18FXX39
TABLE 3-1: TIME-OUT IN VARIOUS SITUATIONS
Oscillator
Configuration
Power-up⁽²⁾
PWRTE = 0
PWRTE = 1
Brown-out
HS with PLL enabled⁽¹⁾
72 ms + 1024 TOSC
+ 2ms
1024 TOSC
+ 2 ms
72 ms⁽²⁾ + 1024 TOSC
+ 2 ms
HS, XT, LP
EC
External RC
72 ms + 1024 TOSC
72 ms
72 ms
1024 TOSC
—
—
72 ms⁽²⁾ + 1024 TOSC
72 ms⁽²⁾
72 ms⁽²⁾
Note 1: 2 ms is the nominal time required for the 4x PLL to lock.
2: 72 ms is the nominal power-up timer delay, if implemented.
Wake-up from
SLEEP or
Oscillator Switch
1024 TOSC + 2 ms
1024 TOSC
—
—
REGISTER 3-1: RCON REGISTER BITS AND POSITIONS
R/W-0
U-0
U-0
R/W-1
R-1
R-1
IPEN
—
—
RI
TO
PD
bit 7
Note 1: Refer to Section 4.14 (page 50) for bit definitions.
R/W-0
POR
R/W-0
BOR
bit 0
TABLE 3-2: STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
Condition
Program
Counter
RCON
Register
RI TO PD POR BOR STKFUL STKUNF
Power-on Reset
0000h 0--1 1100 1 1 1 0
0
u
u
MCLR Reset during normal
0000h 0--u uuuu u u u u
u
u
u
operation
Software Reset during normal
0000h 0--0 uuuu 0 u u u
u
u
u
operation
Stack Full Reset during normal
0000h 0--u uu11 u u u u
u
u
1
operation
Stack Underflow Reset during
0000h 0--u uu11 u u u u
u
1
u
normal operation
MCLR Reset during SLEEP
0000h 0--u 10uu u 1 0 u
u
u
u
WDT Reset
0000h 0--u 01uu 1 0 1 u
u
u
u
WDT Wake-up
PC + 2 u--u 00uu u 0 0 u
u
u
u
Brown-out Reset
0000h 0--1 11u0 1 1 1 1
0
u
u
Interrupt wake-up from SLEEP PC + 2⁽¹⁾ u--u 00uu u 1 0 u
u
u
u
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as '0'
Note 1: When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (0x000008h or 0x000018h).
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Preliminary
DS30485B-page 25