PIC18FXX39 Datasheet, PDF (310/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

PIC18FXX39
C
CALL ................................................................................ 226
Clocking Scheme/Instruction Cycle .................................... 36
CLRF ................................................................................ 227
CLRWDT .......................................................................... 227
Code Examples
16 x 16 Signed Multiply Routine ................................. 68
16 x 16 Unsigned Multiply Routine ............................. 68
8 x 8 Signed Multiply Routine ..................................... 67
8 x 8 Unsigned Multiply Routine ................................. 67
Data EEPROM Read ................................................. 63
Data EEPROM Refresh Routine ................................ 64
Data EEPROM Write .................................................. 63
Erasing a FLASH Program Memory Row .................. 56
How to Clear RAM (Bank 1) Using
Indirect Addressing ............................................ 47
Initializing PORTA ...................................................... 83
Initializing PORTB ...................................................... 86
Initializing PORTC ...................................................... 89
Initializing PORTD ...................................................... 91
Initializing PORTE ...................................................... 93
Loading the SSPBUF (SSPSR) Register ................. 128
Motor Control Routine using ProMPT APIs .............. 121
Reading a FLASH Program Memory Word ................ 55
Saving STATUS, WREG and
BSR Registers in RAM ....................................... 81
Writing to FLASH Program Memory ..................... 58–59
Code Protection ............................................................... 195
COMF ............................................................................... 228
Configuration Bits ............................................................. 195
Context Saving During Interrupts ....................................... 81
Conversion Considerations .............................................. 306
CPFSEQ .......................................................................... 228
CPFSGT ........................................................................... 229
CPFSLT ........................................................................... 229
D
Data EEPROM Memory
Associated Registers ................................................. 65
EEADR Register ........................................................ 61
EECON1 Register ...................................................... 61
EECON2 Register ...................................................... 61
Operation During Code Protect .................................. 64
Protection Against Spurious Write ............................. 64
Reading ...................................................................... 63
Using .......................................................................... 64
Write Verify ................................................................. 64
Writing ........................................................................ 63
Data Memory ...................................................................... 39
General Purpose Registers ........................................ 39
Map for PIC18FX439 ................................................. 40
Map for PIC18FX539 ................................................. 41
Special Function Registers ........................................ 39
DAW ................................................................................. 230
DC and AC Characteristics
Graphs and Tables ................................................... 287
DC Characteristics ................................................... 261, 264
DCFSNZ ........................................................................... 231
DECF ............................................................................... 230
DECFSZ ........................................................................... 231
Developing Applications ................................................... 121
Development Support ...................................................... 253
Device Differences ........................................................... 305
Device Overview .................................................................. 7
Features ....................................................................... 8
Direct Addressing ............................................................... 48
Example ..................................................................... 46
E
Electrical Characteristics .................................................. 259
Errata ................................................................................... 5
F
Firmware Instructions ....................................................... 211
FLASH Program Memory ................................................... 51
Associated Registers ................................................. 59
Control Registers ....................................................... 52
Erase Sequence ........................................................ 56
Erasing ....................................................................... 56
Operation During Code Protection ............................. 59
Reading ..................................................................... 55
TABLAT Register ....................................................... 54
Table Pointer ............................................................. 54
Boundaries Based on Operation ........................ 54
Table Pointer Boundaries .......................................... 54
Table Reads and Table Writes .................................. 51
Writing to .................................................................... 57
Protection Against Spurious Writes ................... 59
Unexpected Termination .................................... 59
Write Verify ........................................................ 59
G
GOTO .............................................................................. 232
H
Hardware Interface .......................................................... 113
Hardware Multiplier ............................................................ 67
Introduction ................................................................ 67
Operation ................................................................... 67
Performance Comparison .......................................... 67
HS/PLL .............................................................................. 20
I
I/O Ports ............................................................................. 83
I²C Mode
Bus Collision
During a STOP Condition ................................ 163
I²C Mode .......................................................................... 134
ACK Pulse ........................................................138, 139
Acknowledge Sequence Timing .............................. 158
Baud Rate Generator ............................................... 151
Bus Collision
Repeated START Condition ............................ 162
START Condition ............................................. 160
Clock Arbitration ...................................................... 152
Clock Stretching ....................................................... 144
Effect of a RESET .................................................... 159
General Call Address Support ................................. 148
Master Mode ............................................................ 149
Operation ......................................................... 150
Reception ........................................................ 155
Repeated START Condition Timing ................ 154
START Condition Timing ................................. 153
Transmission ................................................... 155
Multi-Master Communication, Bus Collision
and Arbitration ................................................. 159
DS30485B-page 310
Preliminary
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