PIC18FXX39 Datasheet, PDF (209/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

PIC18FXX39
FIGURE 20-5:
EXTERNAL BLOCK TABLE READ (EBTRn) DISALLOWED
Register Values
Program Memory
Configuration Bit Settings
TBLPTR = 000FFF
000000h
0001FFh
000200h
WRTB,EBTRB = 11
WRT0,EBTR0 = 10
PC = 002FFE
TBLRD *
001FFFh
002000h
003FFFh
004000h
005FFFh
WRT1,EBTR1 = 11
WRT2,EBTR2 = 11
Results: All Table Reads from external blocks to Blockn are disabled whenever EBTRn = 0.
TABLAT register returns a value of ‘0’.
FIGURE 20-6:
EXTERNAL BLOCK TABLE READ (EBTRn) ALLOWED
Register Values
TBLPTR = 000FFF
Program Memory
000000h
0001FFh
000200h
Configuration Bit Settings
WRTB,EBTRB = 11
WRT0,EBTR0 = 10
PC = 001FFE
TBLRD *
001FFFh
002000h
003FFFh
004000h
005FFFh
WRT1,EBTR1 = 11
WRT2,EBTR2 = 11
Results: Table Reads permitted within Blockn, even when EBTRBn = 0.
TABLAT register returns the value of the data at the location TBLPTR.
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Preliminary
DS30485B-page 209