PIC18FXX39 Datasheet, PDF (286/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

PIC18FXX39
TABLE 23-22: A/D CONVERSION REQUIREMENTS
Param
No.
Symbol
Characteristic
Min Max Units
Conditions
130 TAD
A/D clock period
PIC18FXXXX
PIC18LFXXXX
1.6
20⁽⁴⁾
s TOSC based
2.0
6.0
s A/D RC mode
131 TCNV Conversion time
11
12
TAD
(not including acquisition time) (Note 1)
132 TACQ Acquisition time (Note 2)
5
—
s VREF = VDD = 5.0V
10
—
s VREF = VDD = 2.5V
135 TSWC Switching Time from convert  sample
— (Note 3)
Note 1: ADRES register may be read on the following TCY cycle.
2: The time for the holding capacitor to acquire the “New” input voltage, when the new input value has not
changed by more than 1 LSB from the last sampled voltage. The source impedance (RS) on the input channels
is 50. See Section 18.0 for more information on acquisition time consideration.
3: On the next Q4 cycle of the device clock.
4: The time of the A/D clock period is dependent on the device frequency and the TAD clock divider.
DS30485B-page 286
Preliminary
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