PIC18FXX39 Datasheet, PDF(45/322 Page) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

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PIC18FXX39 Datasheet, PDF (45/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

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PIC18FXX39

TABLE 4-2: REGISTER FILE SUMMARY (CONTINUED)

File Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on Details

POR, BOR on page:

IPR2

â

â

â

EEIP

BCLIP

LVDIP TMR3IP

â

---1 1111 29, 79

PIR2

â

â

â

EEIF

BCLIF

LVDIF TMR3IF

â

---0 0000 29, 75

PIE2

â

â

â

EEIE

BCLIE

LVDIE TMR3IE

â

---0 0000 29, 77

IPR1

PSPIP(3)

ADIP

RCIP

TXIP

SSPIP

â

TMR2IP TMR1IP 1111 1111 29, 78

PIR1

PSPIF(3)

ADIF

RCIF

TXIF

SSPIF

â

TMR2IF TMR1IF 0000 0000 29, 74

PIE1

PSPIE(3)

ADIE

RCIE

TXIE

SSPIE

â

TMR2IE TMR1IE 0000 0000 29, 76

TRISE(3)

IBF

OBF

IBOV PSPMODE

â

Data Direction bits for PORTE

0000 -111 29, 94

TRISD(3)

Data Direction Control Register for PORTD

1111 1111 29, 92

TRISC

TRISC7 TRISC6 TRISC5 TRISC4 TRISC3

*

*

TRISC0 1111 1111 29, 89

TRISB

Data Direction Control Register for PORTB

1111 1111 29, 86

TRISA

â

TRISA6(1) Data Direction Control Register for PORTA

-111 1111 29, 83

LATE(3)

â

â

â

â

â

Read PORTE Data Latch,

Write PORTE Data Latch

---- -xxx 29, 95

LATD(3)

Read PORTD Data Latch, Write PORTD Data Latch

xxxx xxxx 29, 91

LATC

LATC7

LATC6

LATC5

LATC4

LATC3

*

*

LATC0 xxxx xxxx 29, 89

LATB

Read PORTB Data Latch, Write PORTB Data Latch

xxxx xxxx 29, 86

LATA

â

LATA6(1) Read PORTA Data Latch, Write PORTA Data Latch(1)

-xxx xxxx 29, 83

PORTE(3) Read PORTE pins, Write PORTE Data Latch

---- -000 29, 95

PORTD(3) Read PORTD pins, Write PORTD Data Latch

xxxx xxxx 29, 91

PORTC

RC7

RC6

RC5

RC4

RC3

*

*

RC0 xxxx xxxx 29, 89

PORTB

Read PORTB pins, Write PORTB Data Latch

xxxx xxxx 29, 86

PORTA

â

RA6(1) Read PORTA pins, Write PORTA Data Latch(1)

-x0x 0000 29, 83

Legend:

*

Note 1:

2:

3:

x = unknown, u = unchanged, - = unimplemented, q = value depends on condition

These registers (or individual bits) are retained to maintain compatibility with PIC18FXX2 devices; however, the indicated bits are

reserved in PIC18FXX39 devices. Users should not alter the values of these bits. See Section 4.9.2 for details.

RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator mode only and read '0' in all other Oscillator modes.

Bit 21 of the TBLPTRU allows access to the device configuration bits.

These registers and bits are reserved on the PIC18F2X39 devices; always maintain these clear.

ï£ 2002-2013 Microchip Technology Inc.

Preliminary

DS30485B-page 45

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