PIC18FXX39 Datasheet, PDF (75/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

PIC18FXX39
REGISTER 8-5:
PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2
U-0
U-0
U-0
R/W-0 R/W-0 R/W-0 R/W-0
—
—
—
EEIF
BCLIF LVDIF TMR3IF
bit 7
U-0
—
bit 0
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as '0'
EEIF: Data EEPROM/FLASH Write Operation Interrupt Flag bit
1 = The write operation is complete (must be cleared in software)
0 = The write operation is not complete, or has not been started
BCLIF: Bus Collision Interrupt Flag bit
1 = A bus collision occurred (must be cleared in software)
0 = No bus collision occurred
LVDIF: Low Voltage Detect Interrupt Flag bit
1 = A low voltage condition occurred (must be cleared in software)
0 = The device voltage is above the Low Voltage Detect trip point
TMR3IF: TMR3 Overflow Interrupt Flag bit
1 = TMR3 register overflowed (must be cleared in software)
0 = TMR3 register did not overflow
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
 2002-2013 Microchip Technology Inc.
Preliminary
DS30485B-page 75