PIC18FXX39 Datasheet, PDF (284/322 Pages) Microchip Technology – Enhanced FLASH Microcontrollers with Single Phase Induction Motor Control Kernel

PIC18FXX39
FIGURE 23-20: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
RC7/RX/DT
pin
121
121
120
122
Note: Refer to Figure 23-4 for load conditions.
TABLE 23-19: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max
120 TckH2dtV SYNC XMIT (MASTER & SLAVE)
Clock high to data out valid
PIC18FXXXX —
50
PIC18LFXXXX —
150
121 Tckr
Clock out rise time and fall time
PIC18FXXXX —
25
(Master mode)
PIC18LFXXXX —
60
122 Tdtr
Data out rise time and fall time
PIC18FXXXX —
25
PIC18LFXXXX —
60
Units Conditions
ns
ns VDD = 2V
ns
ns VDD = 2V
ns
ns VDD = 2V
FIGURE 23-21: USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
RC7/RX/DT
pin
125
126
Note: Refer to Figure 23-4 for load conditions.
TABLE 23-20: USART SYNCHRONOUS RECEIVE REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
125 TdtV2ckl SYNC RCV (MASTER & SLAVE)
Data hold before CK  (DT hold time)
10
126 TckL2dtl Data hold after CK  (DT hold time) PIC18FXXXX
15
PIC18LFXXXX
20
Max Units Conditions
—
ns
—
ns
—
ns VDD = 2V
DS30485B-page 284
Preliminary
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