|
PIC24FJ16MC101_12 Datasheet, PDF (338/350 Pages) Microchip Technology – 16-bit Microcontrollers (up to 32 KB Flash and 2 KB SRAM) | |||
|
◁ |
PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
TABLE A-2: MAJOR SECTION UPDATES (CONTINUED)
Section Name
Update Description
Section 7.0 âInterrupt
Controllerâ
Updated the Interrupt Vectors (see Table 7-1).
The following registers were updated or added:
⢠Register 7-5: IFS0: Interrupt Flag Status Register 0
⢠Register 7-11: IEC1: Interrupt Enable Control Register 1
⢠Register 7-21: IPC6: Interrupt Priority Control Register 6
Section 9.0 âPower-
Saving Featuresâ
Section 10.0 âI/O Portsâ
Updated Register 9-1: PMD1: Peripheral Module Disable Control Register 1.
Updated TABLE 10-1: Selectable Input Sources (Maps Input to Function)(1).
Updated TABLE 10-2: Output Selection for Remappable Pin (RPn)
Section 12.0 âTimer2/3
Featureâ
The following registers were updated or added:
⢠Register 10-4: RPINR4: Peripheral Pin Select Input Register 4
⢠Register 10-6: RPINR8: Peripheral Pin Select Input Register 8
⢠Register 10-19: RPOR8: Peripheral Pin Select Output Register 8
⢠Register 10-20: RPOR9: Peripheral Pin Select Output Register 9
⢠Register 10-21: RPOR10: Peripheral Pin Select Output Register 10
⢠Register 10-22: RPOR11: Peripheral Pin Select Output Register 11
⢠Register 10-23: RPOR12: Peripheral Pin Select Output Register 12
The features and operation information was extensively updated in support of Timer4/5
(see Section 12.1 â32-bit Operationâ and Section 12.2 â16-bit Operationâ).
The block diagrams were updated in support of the new timers (see Figure 12-1,
Figure 12-2, and Figure 12-3).
Section 15.0 âMotor
Control PWM Moduleâ
Section 19.0 â10-bit
Analog-to-Digital
Converter (ADC)â
The following registers were added:
⢠Register 12-3: T4CON Control Register
⢠Register 12-4: T5CON Control Register
Updated TABLE 15-1: Internal Pull-down resistors on PWM Fault pins.
Note 2 was added to Register 15-5: PWMXCON1: PWM Control Register 1(1).
The number of available input pins and channels were updated from six to 14.
Updated FIGURE 19-1: ADC1 Block Diagram for PIC24FJXXMC101 Devices.
Updated FIGURE 19-2: ADC1 Block Diagram for PIC24FJXXMC102 Devices.
Added FIGURE 19-3: ADC1 Block Diagram for PIC24FJXXMC104 Devices.
The following registers were updated:
⢠Register 19-4: AD1CHS123: ADC1 Input Channel 1, 2, 3 Select Register
⢠Register 19-5: AD1CHS0: ADC1 INPUT Channel 0 select Register
⢠Register 19-6: AD1CSSL: ADC1 Input Scan Select Register Low(1,2,3)
⢠Register 19-7: AD1PCFGL: ADC1 Port Configuration Register Low(1,2,3)
DS39997C-page 338
Preliminary
© 2011-2012 Microchip Technology Inc.
|
▷ |