PIC24FJ16MC101_12 Datasheet, PDF (191/350 Pages) Microchip Technology – 16-bit Microcontrollers (up to 32 KB Flash and 2 KB SRAM)

PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
19.0 10-BIT ANALOG-TO-DIGITAL
CONVERTER (ADC)
Note 1: This data sheet summarizes the features
of the PIC24FJ16MC101/102 and
PIC24FJ32MC101/102/104 family of
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to Section 46. “10-bit Analog-to-
Digital Converter (ADC) with 4 Simul-
taneous Conversions” (DS39737) in
the “PIC24F Family Reference Manual”,
which is available from the Microchip web
site (www.microchip.com).
2: It is important to note that the
specifications in Section 26.0 “Electri-
cal Characteristics” of this data sheet,
supercede any specifications that may be
provided in PIC24F Family Reference
Manual sections.
3: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
The PIC24FJ16MC101/102 and PIC24FJ32MC101/
102/104 devices have up to 14 ADC module input
channels.
19.1 Key Features
The 10-bit ADC configuration has the following key
features:
• Successive Approximation (SAR) conversion
• Conversion speeds of up to 1.1 Msps
• Up to 14 analog input pins
• Four Sample and Hold circuits for simultaneous
sampling of up to four analog input pins
• Automatic Channel Scan mode
• Selectable conversion trigger source
• Selectable Buffer Fill modes
• Four result alignment options (signed/unsigned,
fractional/integer)
• Operation during CPU Sleep and Idle modes
• 16-word conversion result buffer
Depending on the particular device pinout, the ADC
can have up to 14 analog input pins, designated AN0
through AN5.
Block diagrams of the ADC module are shown in
Figure 19-1 and Figure 19-2.
19.2 ADC Initialization
To configure the ADC module:
1. Select port pins as analog inputs
(ADxPCFGH<15:0> or ADxPCFGL<15:0>).
2. Select the analog conversion clock to match the
desired data rate with the processor clock
(ADxCON3<7:0>).
3. Determine how many sample-and-hold
channels will be used (ADxCON2<9:8>).
4. Select the appropriate sample/conversion
sequence
(ADxCON1<7:5>
and
ADxCON3<12:8>).
5. Select the way conversion results are presented
in the buffer (ADxCON1<9:8>).
6. Turn on the ADC module (ADxCON1<15>).
7. Configure ADC interrupt (if required):
a) Clear the ADxIF bit.
b) Select the ADC interrupt priority.
© 2011-2012 Microchip Technology Inc.
Preliminary
DS39997C-page 191