PIC24FJ16MC101_12 Datasheet, PDF (166/350 Pages) Microchip Technology – 16-bit Microcontrollers (up to 32 KB Flash and 2 KB SRAM)

PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
REGISTER 15-9: PxFLTACON: FAULT A CONTROL REGISTER^(1,2,3,4,5)
U-0
—
bit 15
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
FAOV3H FAOV3L FAOV2H
FAOV2L
R/W-0
FAOV1H
R/W-0
FAOV1L
bit 8
R/W-0
U-0
U-0
U-0
U-0
R/W-1
R/W-1
R/W-1
FLTAM
—
—
—
—
FAEN3
FAEN2
FAEN1
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13-8
bit 7
bit 6-3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
FAOVxH<3:1>:FAOVxL<3:1>: Fault Input A PWM Override Value bits
1 = The PWM output pin is driven active on an external Fault input event
0 = The PWM output pin is driven inactive on an external Fault input event
FLTAM: Fault A Mode bit
1 = The Fault A input pin functions in the Cycle-by-Cycle mode
0 = The Fault A input pin latches all control pins to the programmed states in PxFLTACON<13:8>
Unimplemented: Read as ‘0’
FAEN3: Fault Input A Enable bit
1 = PWMxH3/PWMxL3 pin pair is controlled by Fault Input A
0 = PWMxH3/PWMxL3 pin pair is not controlled by Fault Input A
FAEN2: Fault Input A Enable bit
1 = PWMxH2/PWMxL2 pin pair is controlled by Fault Input A
0 = PWMxH2/PWMxL2 pin pair is not controlled by Fault Input A
FAEN1: Fault Input A Enable bit
1 = PWMxH1/PWMxL1 pin pair is controlled by Fault Input A
0 = PWMxH1/PWMxL1 pin pair is not controlled by Fault Input A
Note 1:
2:
3:
4:
5:
On PIC24FJ16MC101 (20-pin) devices, the FLTA1 pin is supported, but requires an external pull-down
resistor for correct functionality.
On PIC24FJ16MC102 (28-pin) devices, the FLTA1 and FLTB1 pins are supported and do not require an
external pull-down resistor.
The PxFLTACON register is a write-protected register. Refer to Section 15.3 “Write-protected
Registers” for more information on the unlock sequence.
Comparator outputs are not internally connected to the PWM Fault control logic. If using the Comparator
modules for Fault generation, the user must externally connect the desired comparator output pin to the
dedicated FLTA1 or FLTB1 input pin.
During any reset event, the FLTA1 pin is enabled by default and must be cleared as described in
Section 15.2 “PWM Faults”.
DS39997C-page 166
Preliminary
© 2011-2012 Microchip Technology Inc.