PIC24FJ16MC101_12 Datasheet, PDF (248/350 Pages) Microchip Technology – 16-bit Microcontrollers (up to 32 KB Flash and 2 KB SRAM)

PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
TABLE 24-2: INSTRUCTION SET OVERVIEW (CONTINUED)
Assembly
Mnemonic
Assembly Syntax
Description
# of # of Status Flags
Words Cycles Affected
DEC2
DEC2
DEC2
f
f,WREG
f=f–2
WREG = f – 2
1
1 C,DC,N,OV,Z
1
1 C,DC,N,OV,Z
DISI
DEC2
DISI
Ws,Wd
#lit14
Wd = Ws – 2
1
Disable Interrupts for k instruction cycles
1
1 C,DC,N,OV,Z
1
None
DIV
DIV.S Wm,Wn
DIV.SD Wm,Wn
Signed 16/16-bit Integer Divide
Signed 32/16-bit Integer Divide
1
18
N,Z,C,OV
1
18
N,Z,C,OV
EXCH
DIV.U Wm,Wn
DIV.UD Wm,Wn
EXCH Wns,Wnd
Unsigned 16/16-bit Integer Divide
Unsigned 32/16-bit Integer Divide
Swap Wns with Wnd
1
18
N,Z,C,OV
1
18
N,Z,C,OV
1
1
None
FBCL
FF1L
FF1R
FBCL
FF1L
FF1R
Ws,Wnd
Ws,Wnd
Ws,Wnd
Find Bit Change from Left (MSb) Side
1
1
C
Find First One from Left (MSb) Side
1
1
C
Find First One from Right (LSb) Side
1
1
C
GOTO
INC
GOTO
GOTO
INC
Expr
Wn
f
Go to address
Go to indirect
f=f+1
2
2
None
1
2
None
1
1 C,DC,N,OV,Z
INC2
INC
INC
INC2
f,WREG
Ws,Wd
f
WREG = f + 1
Wd = Ws + 1
f=f+2
1
1 C,DC,N,OV,Z
1
1 C,DC,N,OV,Z
1
1 C,DC,N,OV,Z
INC2 f,WREG
INC2 Ws,Wd
IOR
IOR
f
WREG = f + 2
Wd = Ws + 2
f = f .IOR. WREG
1
1 C,DC,N,OV,Z
1
1 C,DC,N,OV,Z
1
1
N,Z
IOR
f,WREG
IOR
#lit10,Wn
IOR
Wb,Ws,Wd
WREG = f .IOR. WREG
Wd = lit10 .IOR. Wd
Wd = Wb .IOR. Ws
1
1
N,Z
1
1
N,Z
1
1
N,Z
IOR
Wb,#lit5,Wd
LAC
LAC
Wso,#Slit4,Acc
LNK
LNK
#lit14
Wd = Wb .IOR. lit5
Load Accumulator
Link Frame Pointer
1
1
N,Z
1
1 OA,OB,OAB,
SA,SB,SAB
1
1
None
LSR
LSR
f
LSR
f,WREG
LSR
Ws,Wd
f = Logical Right Shift f
WREG = Logical Right Shift f
Wd = Logical Right Shift Ws
1
1
C,N,OV,Z
1
1
C,N,OV,Z
1
1
C,N,OV,Z
LSR
Wb,Wns,Wnd
LSR
Wb,#lit5,Wnd
MOV
MOV
f,Wn
Wnd = Logical Right Shift Wb by Wns
Wnd = Logical Right Shift Wb by lit5
Move f to Wn
1
1
1
1
1
1
N,Z
N,Z
None
MOV
MOV
MOV
MOV.b
MOV
MOV
f
f,WREG
#lit16,Wn
#lit8,Wn
Wn,f
Wso,Wdo
Move f to f
Move f to WREG
Move 16-bit literal to Wn
Move 8-bit literal to Wn
Move Wn to f
Move Ws to Wd
1
1
1
1
1
1
1
1
1
1
1
1
N,Z
None
None
None
None
None
MOV
MOV.D
MOV.D
WREG,f
Wns,Wd
Ws,Wnd
Move WREG to f
1
1
Move Double from W(ns):W(ns + 1) to Wd 1
2
Move Double from Ws to W(nd + 1):W(nd) 1
2
None
None
None
DS39997C-page 248
Preliminary
© 2011-2012 Microchip Technology Inc.