PIC24FJ16MC101_12 Datasheet, PDF (280/350 Pages) Microchip Technology – 16-bit Microcontrollers (up to 32 KB Flash and 2 KB SRAM)

PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
FIGURE 26-13:
SCKx
(CKP = 0)
SCKx
(CKP = 1)
SPIx MASTER MODE (FULL-DUPLEX, CKE = 1, CKP = X, SMP = 1) TIMING
CHARACTERISTICS FOR PIC24FJ16MC101/102
SP36
SP10
SP21
SP20
SP35
SP20
SP21
SDOx
MSb
Bit 14 - - - - - -1
SP40
SP30, SP31
SDIx
MSb In
SP41
Note: Refer to Figure 26-1 for load conditions.
Bit 14 - - - -1
LSb
LSb In
TABLE 26-31: SPIx MASTER MODE (FULL-DUPLEX, CKE = 1, CKP = x, SMP = 1) TIMING
REQUIREMENTS FOR PIC24FJ16MC101/102
AC CHARACTERISTICS
Standard Operating Conditions: 2.4V to 3.6V
(unless otherwise stated)
Operating temperature -40°C ≤ TA ≤ +85°C for Industrial
-40°C ≤ TA ≤ +125°C for Extended
Param
No.
Symbol
Characteristic⁽¹⁾
Min Typ⁽²⁾ Max Units
Conditions
SP10 TscP
Maximum SCK Frequency
—
—
10
MHz ^{See Note 3}
SP20 TscF
SCKx Output Fall Time
—
—
—
ns See parameter DO32
and Note 4
SP21 TscR
SCKx Output Rise Time
—
—
—
ns See parameter DO31
and Note 4
SP30 TdoF
SDOx Data Output Fall Time
—
—
—
ns See parameter DO32
and Note 4
SP31 TdoR
SDOx Data Output Rise Time —
—
—
ns See parameter DO31
and Note 4
SP35 TscH2doV, SDOx Data Output Valid after —
6
20
ns
—
TscL2doV SCKx Edge
SP36 TdoV2sc, SDOx Data Output Setup to
30
—
—
ns
—
TdoV2scL First SCKx Edge
SP40 TdiV2scH, Setup Time of SDIx Data
30
—
—
ns
—
TdiV2scL Input to SCKx Edge
SP41 TscH2diL, Hold Time of SDIx Data Input 30
—
—
ns
—
TscL2diL to SCKx Edge
Note 1: These parameters are characterized, but are not tested in manufacturing.
2: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated.
3: The minimum clock period for SCKx is 100 ns. The clock generated in Master mode must not violate this
specification.
4: Assumes 50 pF load on all SPIx pins.
DS39997C-page 280
Preliminary
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