PIC24FJ16MC101_12 Datasheet, PDF (140/350 Pages) Microchip Technology – 16-bit Microcontrollers (up to 32 KB Flash and 2 KB SRAM)

PIC24FJ16MC101/102 AND PIC24FJ32MC101/102/104
REGISTER 11-1: T1CON: TIMER1 CONTROL REGISTER
R/W-0
U-0
R/W-0
U-0
U-0
U-0
TON⁽¹⁾
—
TSIDL
—
—
—
bit 15
U-0
U-0
—
—
bit 8
U-0
—
bit 7
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
U-0
TGATE
TCKPS<1:0>
—
TSYNC
TCS⁽¹⁾
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
TON: Timer1 On bit⁽¹⁾
1 = Starts 16-bit Timer1
0 = Stops 16-bit Timer1
Unimplemented: Read as ‘0’
TSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
TGATE: Timer1 Gated Time Accumulation Enable bit
When TCS = 1:
This bit is ignored.
When TCS = 0:
1 = Gated time accumulation enabled
0 = Gated time accumulation disabled
TCKPS<1:0> Timer1 Input Clock Prescale Select bits
11 = 1:256
10 = 1:64
01 = 1:8
00 = 1:1
Unimplemented: Read as ‘0’
TSYNC: Timer1 External Clock Input Synchronization Select bit
When TCS = 1:
1 = Synchronize external clock input
0 = Do not synchronize external clock input
When TCS = 0:
This bit is ignored.
TCS: Timer1 Clock Source Select bit⁽¹⁾
1 = External clock from pin T1CK (on the rising edge)
0 = Internal clock (FCY)
Unimplemented: Read as ‘0’
Note 1: When TCS = 1 and TON = 1, writes to the TMR1 register are inhibited from the CPU.
DS39997C-page 140
Preliminary
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