PIC24FJ16MC101_12 Datasheet, PDF (236/350 Pages) Microchip Technology – 16-bit Microcontrollers (up to 32 KB Flash and 2 KB SRAM)

The Configuration Shadow register map is shown in Table 23-1.
TABLE 23-1: CONFIGURATION SHADOW REGISTER MAP
File Name Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
FGS
F80004
—
—
—
—
—
FOSCSEL F80006
IESO
PWMLOCK
—
WDTWIN<1:0>
FOSC
F80008
FCKSM<1:0>
IOL1WAY
—
—
FWDT
F8000A
FWDTEN
WINDIS
PLLKEN
WDTPRE
FPOR
F8000C
PWMPIN
HPOL
LPOL
ALTI2C1
—
FICD
F8000E
Reserved⁽¹⁾
—
Reserved⁽²⁾
Reserved⁽²⁾
—
Legend:
Note 1:
2:
— = unimplemented, read as ‘1’.
This bit is reserved for use by development tools and must be programmed as ‘1’.
This bit is reserved; program as ‘0’.
Bit 2
Bit 1
Bit 0
—
GCP
GWRP
FNOSC<2:0>
OSCIOFNC
POSCMD<1:0>
WDTPOST<3:0>
—
—
—
—
ICS<1:0>
The Configuration Flash Words map is shown in Table 23-2.
TABLE 23-2: CONFIGURATION FLASH WORDS FOR PIC24FJ16MC10X DEVICES
File
Name
Addr. Bits 23-16
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10 Bit 9 Bit 8 Bit 7
Bit 6
Bit 5
Bit 4
Bit 3 Bit 2 Bit 1 Bit 0
CONFIG2 002BFC —
IESO
PWMLOCK⁽²⁾ PWMPIN⁽²⁾
WDTWIN<1:0>
FNOSC<2:0>
FCKSM<1:0> OSCIOFNC IOL1WAY LPOL⁽²⁾ ALTI2C1 POSCMD<1:0>
CONFIG1 002BFE
—
Reserved⁽³⁾ Reserved⁽³⁾
GCP
GWRP Reserved⁽⁴⁾ HPOL⁽²⁾ ICS<1:0> FWDTEN WINDIS PLLKEN WDTPRE
WDTPOST<3:0>
Legend:
Note 1:
2:
3:
4:
— = unimplemented, read as ‘1’.
During a Power-on Reset (POR), the contents of these Flash locations are transferred to the Configuration Shadow registers.
This bit is reserved on PIC24FJ16MC10X devices and reads as ‘1’.
This bit is reserved; program as ‘0’.
This bit is reserved for use by development tools and must be programmed as ‘1’.
TABLE 23-3: CONFIGURATION FLASH WORDS FOR PIC24FJ32MC10X DEVICES
File
Name
Addr. Bits 23-16
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10 Bit 9 Bit 8 Bit 7
Bit 6
Bit 5
Bit 4
Bit 3 Bit 2 Bit 1 Bit 0
CONFIG2 0057FC
—
IESO
PWMLOCK⁽²⁾ PWMPIN⁽²⁾
WDTWIN<1:0>
FNOSC<2:0>
FCKSM<1:0> OSCIOFNC IOL1WAY LPOL⁽²⁾ ALTI2C1 POSCMD<1:0>
CONFIG1 0057FE
—
Reserved⁽³⁾ Reserved⁽³⁾
GCP
GWRP Reserved⁽⁴⁾ HPOL⁽²⁾ ICS<1:0> FWDTEN WINDIS PLLKEN WDTPRE
WDTPOST<3:0>
Legend:
Note 1:
2:
3:
4:
— = unimplemented, read as ‘1’.
During a Power-on Reset (POR), the contents of these Flash locations are transferred to the Configuration Shadow registers.
This bit is reserved on PIC24FJ32MC10X devices and reads as ‘1’.
This bit is reserved; program as ‘0’.
This bit is reserved for use by development tools and must be programmed as ‘1’.