JG82855GMESL7VN Datasheet, PDF (79/213 Pages) Intel Corporation – Intel® 855GM/855GME Chipset Graphics and Memory Controller Hub (GMCH)

Register Description
R
Bit
1
0
Description
AGP/DVO Mux Strap (Read only)
Specifies the use of AGP bus muxed with DVO. This bit is defined at Reset by a strap on the
G_PAR/DVO_DETECT signal. By default the AGP bus pulls this signal high. The presence of an DVO
device pulls this signal low. The presence of a DVO device disables Device #1 and associated memory
and io spaces are disabled. In addition, sets the Next_Pointer = 00h in the capability register, converts
APBASE to read only, and disables Aperture Global Access. Also prevents VGA memory and IO
decodes to the AGP interface.
If AGP capability is limited (disabled), then the AGP pins are dedicated to internal graphics DVO
functionality.
If AGP capability is available, then based on this strap, the AGP interface is used for AGP functionality
or DVO functionality based on this strap.
1= AGP.
0 = DVO
Reserved
4.8.25
ACAPID – AGP Capability Identifier Register (Device #0)
Address Offset:
Default Value:
Access:
Size:
A0-A3h
00200002h
Read Only
32 bits
This register provides standard identifier for AGP capability.
Bit
31:24
23:20
19:16
15:8
7:0
Description
Reserved
Major AGP Revision Number. These bits provide a major revision number of AGP specification to
which this version of GMCH conforms. These bits are set to the value 0010b to indicate AGP Rev. 2.x.
Minor AGP Revision Number. These bits provide a minor revision number of AGP specification to
which this version of GMCH conforms. This is set to 0000b (i.e., implying Rev x.0)
Together with major revision number this field identifies GMCH as an AGP REV 2.0 compliant device.
Next Capability Pointer. AGP capability is the last capability described via the capability pointer
mechanism and therefore these bits are set to 00h to indicate the end of the capability linked list.
AGP Capability ID. This field identifies the linked list item as containing AGP registers. This field has
the value 02h as assigned by the PCI SIG.
Datasheet
79