JG82855GMESL7VN Datasheet, PDF (41/213 Pages) Intel Corporation – Intel® 855GM/855GME Chipset Graphics and Memory Controller Hub (GMCH)

Signal Descriptions
R
3.6
Internal Graphics Display Signals
The IGD has support for a dedicated LVDS LCD Flat Panel Interface, DVOB/C interfaces, and an
Analog CRT port.
3.6.1 Dedicated LVDS LCD Flat Panel Interface
Table 12. Dedicated LVDS LCD Flat Panel Interface Signal Descriptions
Name
ICLKAP
ICLKAM
IYAP[3:0]
IYAM[3:0]
ICLKBP
ICLKBM
IYBP[3:0]
IYBM[3:0]
Type
O
LVDS
O
LVDS
O
LVDS
O
LVDS
O
LVDS
O
LVDS
O
LVDS
O
LVDS
Voltage
1.25 V ±225 mV
1.25 V ±225 mV
1.25 V ±225 mV
1.25 V ±225 mV
1.25 V ±225 mV
1.25 V ±225 mV
1.25 V ±225 mV
1.25 V ± 225 mV
Description
Channel A differential clock pair output (true): 245–800 MHz
Channel A differential clock pair output (compliment): 245–
800 MHz.
Channel A differential data pair 3:0 output (true): 245–800 MHz.
Channel A differential data pair 3:0 output (compliment): 245–
800 MHz.
Channel B differential clock pair output (true): 245–800 MHz.
Channel B differential clock pair output (compliment): 245–
800 MHz.
Channel B differential data pair 3:0 output (true): 245–800 MHz.
Channel B differential data pair 3:0 output (compliment): 245–
800 MHz.
Datasheet
41