IA186EM_04 Datasheet, PDF (99/133 Pages) InnovASIC, Inc – 8/16-Bit Microcontrollers

IA186EM/IA188EM
8/16-BIT Microcontrollers
Data Sheet
As of Production Version -03
Write Cycle Timing
No. Name
Description
MIN MAX
General Timing Requirements
1 tDVCL
Data in Setup
10
2 tCLDX
Data in Hold
0
General Timing Responses
3 tCHSV
Status Active Delay
0
6
4 tCLSH
Status Inactive Delay
0
6
5 tCLAV
ad Address Valid Delay
0
12
6 tCLAX
Address Hold
0
12
7 tCLDV
Data Valid Delay
0
12
8 tCHDX
Status Hold Time
0
9 tCHLH
ale Active Delay
0
8
10 tLHLL
ale Width
tCLCH-
5
11 tCHLL
ale Inactive Delay
0
8
12 tAVLL
ad Address Valid to ale Low
tCLCH
13 tLLAX
ad Address Hold from ale Inactive
tCHCL
14 tAVCH
ad Address Valid to Clock High
0
16 tCLCSV
mcs_n/pcs_n Inactive Delay
0
12
17 tCXCSX
mcs_n/pcs_n Hold from Command Inactive tCLCH
18 tCHCSX
mcs_n/pcs_n Inactive Delay
0
12
19 tDXDL
den_n Inactive to dt_r_n Low
0
20 tCVCTV
Control Active Delay 1
0
10
22 tCHCTV
Control Active Delay 2
0
9
23 tLHAV
ale High to Address Valid
7.5
Write Cycle Timing Responses
30 tCLDOX
Data Hold Time
0
31 tCVCTX
Control Inactive Delay
0
10
32 tWLWH
wr_n Pulse Width
2tCLCL
33 tWHLH
wr_n Inactive to ale High
tCLCH
34 tWHDX
Data Hold after wr_n
tCLCL
35 tWHDEX
wr_n Inactive to den_n Inactive
tCLCH
65 tAVWL
a Address Valid to wr_n Low
tCLCL
+
tCHCL
67 tCHCSV
clkoutA High to lcs_n/usc_n Valid
0
9
68 tCHAV
clkoutA High to a Address Valid
0
8
87 tAVBL
a Address Valid to whb_n/wlb_n Low
tCHCL
-1.5
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3737 Princeton NE, Ste 130 • Albuquerque, NM 87107 • Tel [phone] • Fax [phone] • www.Innovasic.com