IA186EM_04 Datasheet, PDF(77/133 Page) InnovASIC, Inc

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IA186EM_04 Datasheet, PDF (77/133 Pages) InnovASIC, Inc – 8/16-Bit Microcontrollers

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IA186EM/IA188EM

8/16-BIT Microcontrollers

Data Sheet

As of Production Version -03

Mnemonic

JNLE

JGE

JNL

JLE

JNG

JMP

JNE

JNZ

JNO

JNP

JPO

JNS

JPE

LAHF

LDS

LEA

LEAVE

LES

LOCK

LODS

Instruction

Description

Jump short if greater (Z & S = O)

Jump short if not less or equal

(Z & S = O)

Jump short if greater or equal

(S=O)

Jump short if not less (S = O)

Jump short if less or equal

(Z & S = O)

Jump short if not greater

(Z & S = O)

Jump short direct, disp relative to

next instruction

Jump near direct, disp relative to

next instruction

Jump near indirect

Jump far direct to doubleword imm

address

Jump m16: 16 indirect and far

Jump short if not equal (Z=0)

Jump short if not zero (Z=0)

Jump short if not overflow (O=1)

Jump short if not parity (P=0)

Jump short if parity odd (P=0)

Jump short if not sign (S=0)

Jump short if overflow (O=1)

Jump short if parity (P=1)

Jump short if sign (S=1)

Load AH with low byte of flags reg

Load DS:r16 with segment :offset

from memory

Load offset for m16 word in 16-bit

reg

Destroy procedure stack frame

Load ES:r16 with segment offset

from memory

Asserts lock_n during an

instruction execution

Load byte segment :[SI] in AL

Load word segment :[SI] in AX

Opcode - Hex

byte byte byte

1 2 3-6

7F cb -

7D cb -

7E cb -

EB cb -

E9 cw -

FF /4 -

EA cd -

FF /5 -

75 cb -

71 cb -

7B cb -

79 cb -

70 cb -

7A cb -

78 cb -

9F - -

C5 /r -

8D /r -

C9 - -

C4 /r -

F0 - -

AC -

Clock Cycles

IA186 IA188

13, 4 13, 4

11/17 11/21

13, 4 13, 4

Flags Affected

ODI TSZ APC

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3737 Princeton NE, Ste 130 â¢ Albuquerque, NM 87107 â¢ Tel 505.883.5263 â¢ Fax 505.883.5477 â¢ www.Innovasic.com

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