IA186EM_04 Datasheet, PDF (103/133 Pages) InnovASIC, Inc – 8/16-Bit Microcontrollers

IA186EM/IA188EM
8/16-BIT Microcontrollers
Data Sheet
As of Production Version -03
PSRAM Write Cycle Timing
No. Name
Comment
General Timing Requirements
1 tDVCL
Data in Setup
2 tCLDX
Data in Hold
General Timing Responses
5 tCLAV
ad Address Valid Delay
7 tCLDV
Data Valid Delay
8 tCHDX
Status Hold Time
9 tCHLH
ale Active Delay
10 tLHLL
ale Width
11 tCHLL
ale Inactive Delay
20 tCVCTV
Control Active Delay 1
23 tLHAV
ale High to Address Valid
80 tCLCLX
lcs_n Inactive Delay
81 tCLCSL
lcs_n Active Delay
84 tLRLL
lcs_n Precharge Pulse Width
Write Cycle Timing Responses
30 tCLDOX
Data Hold Time
31 tCVCTX
Control Inactive Delay
32 tWLWH
wr_n Pulse Width
33 tWHLH
wr_n Inactive to ale High
34 tWHDX
Data Hold after wr_n
65 tAVWL
68 tCHAV
a Address Valid to wr_n Low
clkoutA High to a Address Valid
87 tAVBL
a Address Valid to whb_n/wlb_n Low
MIN MAX Units
10
ns
0
ns
0
12 ns
0
12 ns
0
ns
0
8 ns
tCLCH-5
ns
NULL NULL ns
0
10 ns
7.5
ns
0
9 ns
0
9 ns
tCLCL+
tCLCH
ns
0
ns
0
10 ns
2tCLCL
ns
tCLCH
ns
tCLCL
ns
tCLCL+
tCHCL
ns
0
8 ns
tCHCL -
1.5
ns
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