IA186EM_04 Datasheet, PDF (84/133 Pages) InnovASIC, Inc – 8/16-Bit Microcontrollers

IA186EM/IA188EM
8/16-BIT Microcontrollers
Data Sheet
As of Production Version -03
Mnemonic
SHR
SS
STC
STD
STI
STOS
STOSB
STOSW
SUB
Instruction
Description
Divide unsigned of r/m8 by 2,
once
Divide unsigned of r/m8 by 2, CL
times
Divide unsigned of r/m8 by 2,
imm8 times
Divide unsigned of r/m16 by 2,
once
Divide unsigned of r/m16 by 2, CL
times
Divide unsigned of r/m16 by 2,
imm8 times
SS segment reg override prefix
Set the Carry Flag to 1
Set the Direction Flag so the
source Index (SI) and/or the
Destination Index (DI) regs will
decrement during string
instructions
Enable maskable interrupts after
the next instruction
Store AL in byte ES:[DI]; update DI
Store AX in word ES:[DI]; update
DI
Store AL in byte ES:[DI]; update DI
Store AX in word ES:[DI]; update
DI
Subtract imm8 from AL
Subtract imm16 from AX
Subtract imm8 from r/m8
Subtract imm16 from r/m16
Subtract sign-extended imm8 from
r/m16
Subtract byte reg from r/m8
Subtract word reg from r/m16
Subtract r/m8 from byte reg
Subtract r/m16 from word reg
Opcode - Hex
byte byte byte
1 2 3-6
D0 /7 -
D2 /7 -
C0
/7 data
ib 8
D1 /7 -
D3 /7 -
C1
/7 data
ib 8
36 - -
F9 -
FD - -
FB - -
AA - -
AB - -
AA - -
AB - -
2C ib -
2D iw -
80
/5
ib
-
81
/5
iw
-
83
/5
ib
-
28 /r -
29 /r -
2A /r -
2B /r -
Clock Cycles
IA186 IA188
2/15
5+n/
17+n
5+n/
17+n
2/15
5+n/
17+n
5+n/
17+n
-
2
2/15
5+n/
17+n
5+n/
17+n
2/15
5+n/
17+n
5+n/
17+n
-
2
2
2
2
2
10
10
10
14
10
10
10
14
3
3
4
4
4/16 4/16
4/16 4/20
4/16 4/20
3/10 3/10
3/10 3/14
3/10 3/10
3/10 3/14
Flags Affected
ODI TSZ APC
U- - - RRUR 0
-------- -
-------- 1
-1------ -
--1----- -
-------- -
R- - - RRRR R
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