IA186EM_04 Datasheet, PDF (68/133 Pages) InnovASIC, Inc – 8/16-Bit Microcontrollers

IA186EM/IA188EM
8/16-BIT Microcontrollers
Data Sheet
As of Production Version -03
sdata – Serial Data (synchronous inout)
This pin connects a slave device to synchronous serial transmit and receive data. The last value is
maintained on this pin when it is inactive.
sden1 - sden0 – Serial Data Enables (synchronous outputs with tristate)
These pins facilitate the transfer of data on ports 1 and 0 of the Synchronous Serial Interface (SSI). Either
sden1 or sden0 is asserted by the microcontroller at the start of the data transfer and is de-asserted it when
the transfer is completed. These pins are held low by the microcontroller when they are inactive.
srdy/pio6 - Synchronous Ready (synchronous level-sensitive input)
This signal is an active high input synchronized to clkouta and indicates to the microcontroller that a data
transfer will be completed by the addressed memory space or I/O device.
In contrast to the Asynchronous Ready (ardy), which requires internal synchronization, srdy permits
easier system timing as it already synchronized. Tying srdy high will always assert this ready condition,
whereas tying it low will give control to ardy.
tmrin0/pio11 - Timer Input 0 (synchronous edge-sensitive input)
This signal may be either a clock or control signal for the internal timer 0. The timer is incremented by
the microcontroller after it synchronizes a rising edge of tmrin0. When not used, tmrin0 must be tied
high, or when used as pio11 it is pulled up internally.
tmrin1/pio0 - Timer Input 1 (synchronous edge-sensitive input)
This signal may be either a clock or control signal for the internal timer 1. The timer is incremented by
the microcontroller after it synchronizes a rising edge of tmrin1. When not used, tmrin1 must be tied
high, or when used as pio0 it is pulled up internally.
tmrout0/pio10 - Timer Output 0 (synchronous output)
This signal provides the system with a single pulse or a continuous waveform with a programmable duty
cycle. It is tristated during a bus hold or reset.
tmrout1/pio1 - Timer Output 1 (synchronous output)
This signal provides the system with a single pulse or a continuous waveform with a programmable duty
cycle. It is tristated during a bus hold or reset.
txd/pio22 - Transmit Data (asynchronous output)
This pin provides the system with asynchronous serial transmit data from the serial port.
ucs_n/once1_n - Upper Memory Chip Select (synchronous output) / ONCE Mode Request 1 (input
with internal pull-up)
ucs_n - This pin provides an indication that a memory access is in train to the upper memory block. The
size of the Upper Memory Block and its base address are programmable, with the size adjustable up to
512 Kbytes. ucs_n is held high during bus hold.
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