MC68HC05L16 Datasheet, PDF (99/146 Pages) Freescale Semiconductor, Inc – Microcontrollers

Backplane Driver and Port Selection
10.3 Backplane Driver and Port Selection
The number of backplane (port D) pins depends on the LCD duty. It is automatically selected by DUTY1
and DUTY0 bits in the LCD control register (LCDCR). On reset, these bits are cleared and 1/4 duty is
selected. (See Table 10-1.)
Table 10-1. Backplane and Port Selection
Duty
1/1
1/2
1/3
1/4
LCD Control
Pin Selection
DUTY1
DUTY0 BP3/PD3 BP2/PD2 BP1/PD1
BP0
0
1
PD3
PD2
PD1
BP0
1
0
PD3
PD2
BP1
BP0
1
1
PD3
BP2
BP1
BP0
0
0
BP3
BP2
BP1
BP0
10.4 Frontplane Driver and Port Selection
The number of frontplane (FP) pins depends on the number of port D and port E bits. If port bits are
selected as a parallel output port, the number of the FP pins is decreased to 27 as a minimum. The
selections between frontplane and port (nibble wide) are done by the PEH, PEL, and PDH bits in the
LCDCR (see Table 10-2). These bits also can be controlled on a bit-wide basis by using the PDMUX and
PEMUX registers. PDH, PEH, and PEL have priority over the mux registers. On reset, port D and port E
bits are disconnected and FP27–FP38 pins output V_DD levels.
Table 10-2. Frontplane and Port Selection
FP / Port Control
PEH PEL PDH PDMx
0
0
0
1
1
X
0
0
1
0
0
1
1
X
PEMx
0
1
X
0
1
X
FP27:FP30/
PE7:PE4
FP27:FP30
Varied
PE7:PE4
Port Selection
FP31:FP34/
PE3:PE0
FP31:FP34
Varied
PE3:PE0
FP35:FP38/
PD7:PD4
FP35:FP38
Varied
PD7:PD4
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
Freescale Semiconductor
99