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MC68HC05L16 Datasheet, PDF (122/146 Pages) Freescale Semiconductor, Inc – Microcontrollers
Electrical Specifications
12.9 Control Timing
Characteristic(1)
Frequency of oscillation (OSC)
Crystal
External clock
Internal operating frequency(2), crystal or external
clock (fOSC/2)
VDD = 4.5 V to 5.5 V
VDD = 2.2 V to 5.5 V
Cycle time (fast OSC selected)
VDD = 4.5 V to 5.5 V
VDD = 2.2 V to 5.5 V
RESET pulse width when bus clock active
Timer
Resolution
Input capture (TCAP) pulse width
Interrupt pulse width low (edge-triggered)
Interrupt pulse period(3)
OSC1 pulse width (external clock input)
Symbol
Min
fosc
—
dc
fop
—
—
Max
4.2
4.2
2.1
1.0
tcyc
480
—
1.0
—
tRL
1.5
—
tRESL
4.0
—
tTH, tTL
284
—
tILIH
284
—
tILIL
see note
—
tOH, tOL
110
—
Unit
MHz
MHz
ns
µs
tcyc
tcyc
ns
ns
tcyc
ns
1. +2.2 ≤ VDD ≤ +5.5 Vdc, VSS = 0 Vdc, TL ≤ TA ≤ TH, unless otherwise noted.
2. The system clock divider configuration (SYS1–SYS0 bits) should be selected such that the internal operating frequency
(fOP) does not exceed value specified in fOP for a given fOSC.
3. The minimum period, tILIL, should not be less than the number of cycle times it takes to execute the interrupt service routine
plus 21 tcyc.
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
122
Freescale Semiconductor