MC68HC05L16 Datasheet, PDF (14/146 Pages) Freescale Semiconductor, Inc – Microcontrollers

General Description
OSC1
OSC2
XOSC1
XOSC2
OSC
XOSC
COP
SYSTEM
DIV
SEL
TIMEBASE
SYSTEM
³2
INTERNAL
PROCESSOR
CLOCK
SRAM
512 BYTES
SELF-CHECK ROM
496 BYTES
MASK ROM
16,384 BYTES
+ 16 BYTES
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0/KWI0
PB1/KWI1
PB2/KWI2
PB3/KWI3
PB4/KWI4
PB5/KWI5
PB6/KWI6
PB7/KWI7
PC0/SDI
PC1/SDO
PC2/SCK
PC3/TCAP
PC4/EVI
PC5/EVO
PC6*/IRQ2
PC7*/IRQ1
RESET
VDD
VSS
NDLY**
CPU
CONTROL
ALU
M68HC05 CPU
CPU REGISTERS
ACCUMULATOR
INDEX REGISTER
STACK POINTER
PROGRAM COUNTER
CONDITION CODE REG
LCD
DRIVERS
FP0–PF26
FP27/PE7
FP28/PE6
FP29/PE5
FP30/PE4
FP31/PE3
FP32/PE2
FP33/PE1
FP34/PE0
VLCD3
VLCD2
VLCD1
FP35/PD7
FP36/PD6
FP37/PD5
FP38/PD4
BP3/PD3
BP2/PD2
BP1/PD1
BP0
* Open Drain Only when Output
** The NDLY pin should be connected to V_DD.
Figure 1-1. Block Diagram
NOTE
A line over a signal name indicates an active low signal. For example,
RESET is active low.
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
14
Freescale Semiconductor