MC68HC05L16 Datasheet, PDF (30/146 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory Map
Addr.
$0000
$0001
$0002
$0003
$0004
$0005
↓
$0007
Register Name
Port A Data Direction Register ^Read:
(DDRA) Write:
See page 52. _Reset:
Reserved
Bit 7
DDRA7
0
R
6
DDRA6
0
R
5
DDRA5
0
R
4
DDRA4
0
R
3
DDRA3
0
R
2
DDRA2
0
R
1
DDRA1
0
R
Bit 0
DDRA0
0
R
Port C Data Direction Register ^Read:
(DDRC) Write:
See page 55. _Reset:
Port D MUX Register ^Read:
(PDMUX) Write:
See page 56. _Reset:
Port E MUX Register ^Read:
(PEMUX) Write:
See page 57. _Reset:
Reserved
DDRC7
0
PDM7
0
PEM7
0
R
DDRC6
0
PDM6
0
PEM6
0
R
DDRC5
0
PDM5
0
PEM5
0
R
DDRC4
0
PDM4
0
PEM4
0
R
DDRC3
0
0
0
PEM3
0
R
DDRC2
0
0
0
PEM2
0
R
DDRC1
0
0
0
PEM1
0
R
DDRC0
0
0
0
PEM0
0
R
Reserved
R
R
R
R
R
R
R
R
$0008
$0009
$000A
$000B
$000C
Resistor Control Register 1 ^Read:
0
(RCR1) Write:
See page 31. _{Reset: 0}
Resistor Control Register 2 ^Read: _RC7
(RCR2) Write:
See page 31. _{Reset: 0}
Open-Drain Output Control ^Read: _DWOMH
Register 1 (WOM1) Write:
See page 32. _{Reset: 0}
Open-Drain Output Control ^Read:
1
Register 2 (WOM2) Write:
See page 32. _{Reset: 1}
Reserved
R
0
0
RC6
0
DWOML
0
1
1
R
0
0
RC5
0
EWOMH
0
CWOM5
0
R
0
0
RC4
0
EWOML
0
CWOM4
0
R
RBH
0
RC3
0
0
0
CWOM3
0
R
RBL
0
RC2
0
0
0
CWOM2
0
R
RAH
0
RC1
0
AWOMH
0
CWOM1
0
R
RAL
0
RC0
0
AWOML
0
CWOM0
0
R
$000D
Reserved
R
R
R
R
R
R
R
R
$000E
$000F
Key Wakeup Input Enable Register ^Read:
(KWIEN) Write:
See page 33. _Reset:
Mask Option Status Register ^Read:
(MOSR) Write:
See page 33. _Reset:
KWIE7
0
RSTR
U
KWIE6 KWIE5 KWIE4
0
0
0
OSCR XOSCR
0
U
U
0
KWIE3
0
0
0
KWIE2
0
0
0
KWIE1
0
0
0
KWIE0
0
0
0
= Unimplemented
R
Figure 2-4. Option Map
= Reserved
U = Unaffected
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
30
Freescale Semiconductor