MC68HC05L16 Datasheet, PDF (27/146 Pages) Freescale Semiconductor, Inc – Microcontrollers

Summary of Internal Registers and I/O Map
Addr.
$0019
$001A
$001B
$001C
$001D
$001E
$001F
$0020
$0021
$0022
$0023
$0024
Register Name
Timer Counter Register Low ^Read:
(TCNTL) Write:
See page 88. _Reset:
Alternate Timer Counter Register ^Read:
High (ACNTH) Write:
See page 79. _Reset:
Alternate Timer Counter Register ^Read:
Low (ACMTL) Write:
See page 79. _Reset:
Timer Control Register 2 ^Read:
(TCR2) Write:
See page 85. _Reset:
Timer Status Register 2 ^Read:
(TSR2) Write:
See page 87. _Reset:
Output Compare Register 2 ^Read:
(OC2) Write:
See page 87. _Reset:
Timer Counter Register 2 ^Read:
(TCNT2) Write:
See page 88. _Reset:
LCD Control Register ^Read:
(LCDCR) Write:
See page 100. _Reset:
LCD Data Register 1 ^Read:
(LCDR1) Write:
See page 101. _Reset:
LCD Data Register 2 ^Read:
(LCDR2) Write:
See page 101. _Reset:
LCD Data Register 3 ^Read:
(LCDR3) Write:
See page 101. _Reset:
LCD Data Register 4 ^Read:
(LCDR4) Write:
See page 101. _Reset:
Bit 7
BIT 7
BIT 15
BIT 7
TI2IE
0
TI2F
0
BIT 7
0
BIT 7
0
LCDE
0
F1B3
F3B3
F5B3
F7B3
6
5
4
3
2
BIT 6 BIT 5 BIT 4 BIT 3 BIT 2
Unaffected by reset
BIT 14 BIT 13 BIT 12 BIT 11 BIT 10
Unaffected by reset
BIT 6 BIT 5 BIT 4 BIT 3 BIT 2
Unaffected by reset
OC2IE
0
T2CLK IM2
IL2
0
0
OC2F
0
0
0
0
0
0
0
0
0
RTI2F ROC2F
0
0
0
BIT 6 BIT 5 BIT 4 BIT 3 BIT 2
0
0
0
0
0
BIT 6 BIT 5 BIT 4 BIT 3 BIT 2
0
0
0
0
0
DUTY1 DUTY0
0
PEH
PEL
0
0
0
0
0
F1B2 F1B1 F1B0 F0B3 F0B2
Unaffected by reset
F3B2 F3B1 F3B0 F2B3 F2B2
Unaffected by reset
F5B2 F5B1 F5B0 F4B3 F4B2
Unaffected by reset
F7B2 F7B1 F7B0 F6B3 F6B2
Unaffected by reset
1
BIT 1
BIT 9
BIT 1
OE2
0
0
0
BIT 1
0
BIT 1
0
PDH
0
F0B1
F2B1
F4B1
F6B1
Bit 0
BIT 0
BIT 8
BIT 0
OL2
0
0
0
BIT 0
0
BIT 0
1
0
0
F0B0
F2B0
F4B0
F6B0
= Unimplemented
R = Reserved
Figure 2-3. Main I/O Map (Sheet 3 of 5)
U = Unaffected
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
Freescale Semiconductor
27