MC68HC05L16 Datasheet, PDF (101/146 Pages) Freescale Semiconductor, Inc – Microcontrollers

10.6 LCD Data Register
LCD Data Register
Address:
$0021–$0034
FP (2x–1)
FP (2x–2)
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BP3
BP2
BP1
BP0
BP3
BP2
BP1
BP0
Write:
Reset:
Unaffected by reset
Figure 10-6. LDC Data Registers
LCDRx — LCD Data Registers
Data in the LCDRx (LCDR1–LCDR20) controls the waveform of the two frontplane drivers. Bits 0–3
and bits 4–7 of this register decide the waveforms at the BP0–BP3 timings. If the LCD duty is not 1/4,
the register bit for the unused backplane has no meaning. The upper four bits of LCDR20 are not
implemented and unknown data may be read. (See Table 10-3.)
0 = Output deselect waveform at the corresponding backplane timing
1 = Output select waveform at the corresponding backplane timing
Table 10-3. Frontplane Data Register Bit Usage
Duty
1/1
1/2
1/3
1/4
Bit 7
—
—
—
BP3
Bit 6
—
—
BP2
BP2
Frontplane Data Register Bit Usage
Bit 5 Bit 4 Bit 3 Bit 2
—
BP0
—
—
BP1
BP0
—
—
BP1
BP0
—
BP2
BP1
BP0
BP3
BP2
Bit 1
—
BP1
BP1
BP1
Bit 0
BP0
BP0
BP0
BP0
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
Freescale Semiconductor
101