MC68HC05L16 Datasheet, PDF (45/146 Pages) Freescale Semiconductor, Inc – Microcontrollers

4.3 Interrupt Control Register
Interrupt Control Register
Address: $0008
Bit 7
6
5
4
3
2
1
Bit 0
Read:
IRQ1E IRQ2E
0
KWIE IRQ1S IRQ2S
0
0
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 4-7. Interrupt Control Register (INTCR)
IRQ1E — IRQ1 Interrupt Enable
The IRQ1E bit enables IRQ1 interrupt when IRQ1F is set. This bit is cleared on reset.
0 = IRQ1 interrupt disabled
1 = IRQ1 interrupt enabled
IRQ2E — IRQ2 Interrupt Enable
The IRQ2E bit enables IRQ2 interrupt when IRQ2F is set. This bit is cleared on reset.
0 = IRQ2 interrupt disabled
1 = IRQ2 interrupt enabled
Bit 5 — Reserved
This bit is not used and is always read as logic 0.
KWIE — Key Wakeup Interrupt (KWI) Enable
The KWIE bit enables key wakeup interrupt when KWIF is set. This bit is cleared on reset.
0 = KWI disabled
1 = KWI enabled
IRQ1S — IRQ1 Select Edge Sensitive Only
0 = IRQ1 configured for low level and negative edge sensitive
1 = IRQ1 configured to respond only to negative edges
IRQ2S — IRQ2 Select Edge Sensitive Only
0 = IRQ2 configured for low level and negative edge sensitive
1 = IRQ2 configured to respond only to negative edges
Bits 1 and 0 — Reserved
These bits are not used and always read as logic 0.
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
Freescale Semiconductor
45