MC68HC05L16 Datasheet, PDF (139/146 Pages) Freescale Semiconductor, Inc – Microcontrollers

LCD 1/2 Duty and 1/2 Bias Timing Diagram
A.11 LCD 1/2 Duty and 1/2 Bias Timing Diagram
DUTY = 1/2
BIAS = 1/2
BP0
(VLCD1 = VLCD2 = V_DD–VLCD/2, VLCD3 = V_DD–VLCD)
1FRAME
V_DD
VLCD1, 2
VLCD3
V_DD
BP1
VLCD1, 2
VLCD3
FPx
(XX10)
V_DD
VLCD1, 2
VLCD3
FPy
(XX00)
BP0–FPx
(OFF)
BP1–FPx
(ON)
V_DD
VLCD1, 2
VLCD3
+VLCD
+VLCD/2
0
–VLCD/2
–VLCD
+VLCD
+VLCD/2
0
–VLCD/2
–VLCD
BP0–FPy
(OFF)
+VLCD
+VLCD/2
0
–VLCD/2
–VLCD
BP1–FPy
(OFF)
+VLCD
+VLCD/2
0
–VLCD/2
–VLCD
Figure A-6. CD 1/2 Duty and 1/2 Bias Timing Diagram
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
Freescale Semiconductor
139