MC68HC05L16 Datasheet, PDF (33/146 Pages) Freescale Semiconductor, Inc – Microcontrollers

Option Map for I/O Configurations
CWOMx — Port C Open-Drain Mode (Bitx)
When CWOMx bit is set, port C bits x are configured as open-drain outputs if DDRCx is set. This bit is
cleared on reset.
2.4.5 Key Wakeup Input Enable Register
Address: Option Map — $000E
Bit 7
6
5
4
3
2
1
Read:
Write:
Reset:
KWIE7
0
KWIE6
0
KWIE5
0
KWIE4
0
KWIE3
0
KWIE2
0
KWIE1
0
Figure 2-9. Key Wakeup Input Enable Register (KWIEN)
Bit 0
KWIE0
0
KWIEx — Key Wakeup Input Enable (Bitx)
When KWIEx bit is set, the KWIx (PBx) input is enabled for key wakeup interrupt. This bit is cleared on
reset.
2.4.6 Mask Option Status Register
The mask option status register (MOSR) indicates the state of mask options specified prior to production
of the MC68HC05L16.
Address: Option Map — $000F
Bit 7
6
5
4
3
2
1
Bit 0
Read: RSTR OSCR XOSCR
0
0
0
0
0
Write:
Reset: U
U
U
0
0
0
0
0
= Unimplemented
U = Unaffected
Figure 2-10. Mask Option Status Register (MOSR)
RSTR — RESET Pin Pullup Resistor
When this bit is set, it indicates an internal pullup resistor is attached to the RESET pin by mask option.
OSCR — OSC Feedback Resistor
When this bit is set, it indicates that an internal feedback resistor is attached between OSC1 and OSC2
by mask option.
XOSCR — OSC Feedback Resistor
When this bit is set, it indicates that an internal feedback resistor is attached between XOSC1 and
XOSC2. The damping resistor at the XOSC2 pin is attached by mask option.
Bits 4–0 — Reserved
These bits are not used and always read as logic 0.
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
Freescale Semiconductor
33