MC68HC05L16 Datasheet, PDF (93/146 Pages) Freescale Semiconductor, Inc – Microcontrollers

Prescaler
9.4 Prescaler
The 8-bit prescaler in the timer system divides system clock (PH2) and provides divided clock to each
timer and event input.
CLK1 for timer 1 is a fixed frequency clock (PH2/PH4).
CLK2 for timer 2 is selected by T2R1 and T2R0 bits in the TBCR1, and this clock is also used as the event
input for gate mode. The CLK2 transitions must be synchronous to the falling edge of PH2.
Table 9-4. Timebase Prescale Rate Selection
T2R1
0
0
1
1
T2R0
0
1
0
1
System Clock
Divided by
1
4
32
256
RST
PH2
8-BIT DIVIDER
1111
1432256
1
4
SEL
CLK1
FOR TIMER 1
CLK2
FOR TIMER 2
Figure 9-17. Prescaler Block Diagram
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
Freescale Semiconductor
93