MC68HC05L16 Datasheet, PDF (25/146 Pages) Freescale Semiconductor, Inc – Microcontrollers

Summary of Internal Registers and I/O Map
2.2.6 Option Map
Address locations $0000–$000F are dual mapped. When the OPTM bit in the MISC register is cleared,
the main address map is accessed. When the OPTM bit in the MISC register is set, the option address
map is accessed.
NOTE
Although not necessary for this device, for future compatibility the OPTM bit
should be cleared when accessing memory locations $0010 and above.
2.3 Summary of Internal Registers and I/O Map
Figure 2-3 contains a detailed memory map of the I/O registers.
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$0000
Port A Data Register ^Read: _PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
(PORTA) Write:
See page 52. _Reset:
Unaffected by reset
$0001
Port B Data Register ^Read: _PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
(PORTB) Write:
See page 53. _Reset:
Unaffected by reset
$0002
Port C Data Register ^Read: _PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
(PORTC) Write:
See page 54. _Reset:
Unaffected by reset
$0003
Port D Data Register ^Read: _PD7
PD6
PD5
PD4
PD3
PD2
PD1
1
(PORTD) Write:
See page 56. _{Reset: 1}
1
1
1
1
1
1
1
$0004
Port E Data Register ^Read: _PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
(PORTE) Write:
See page 57. _{Reset: 1}
1
1
1
1
1
1
1
$0005
Reserved
R
R
R
R
R
R
R
R
↓
$0007
Reserved
R
R
R
R
R
R
R
R
$0008
Interrupt Control Register ^Read: _{IRQ1E IRQ2E}
0
KWIE IRQ1S IRQ2S
0
0
(INTCR) Write:
See page 45. _{Reset: 0}
0
0
0
0
0
0
0
$0009
Interrupt Status Register ^{Read: IRQ1F IRQ2F}
0
(INTSR) Write:
See page 46. _{Reset: 0}
0
0
KWIF
0
0
0
0
RIRQ1 RIRQ2
RKWIF
0
0
0
0
0
Serial Peripheral Control Register ^Read: _SPIE
SPE DORD MSTR
0
0
0
SPR
$000A
(SPCR) Write:
See page 73. _{Reset: 0}
0
0
0
0
0
0
0
= Unimplemented
R = Reserved
Figure 2-3. Main I/O Map (Sheet 1 of 5)
U = Unaffected
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
Freescale Semiconductor
25