MC68HC05L16 Datasheet, PDF (78/146 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer System
HIGH LOW
BYTE BYTE
$16
OUTPUT
$17
COMPARE
REGISTER
INTERNAL BUS
INTERNAL
PROCESSOR
CLOCK
8-BIT
BUFFER
÷4
HIGH
BYTE
LOW
BYTE
16-BIT FREE
RUNNING
$18
COUNTER
$19
COUNTER
ALTERNATE
REGISTER
$1A
$1B
HIGH LOW
BYTE BYTE
INPUT
CAPTURE
REGISTER
$14
$15
OUTPUT
COMPARE
CIRCUIT
OVERFLOW
DETECT
CIRCUIT
EDGE
DETECT
CIRCUIT
TIMER
STATUS ICF OCF TOF $13
REGULAR
OUTPUT
LEVEL
REGULAR
DQ
CLK
C
ICIE
OCIE
TOIE
IEDG
TIMER
OLVL ^CONTROL
RESET
REGULAR
$12
INTERRUPT
CIRCUIT
Figure 9-2. Timer 1 Block Diagram
(TCMP) OUTPUT
LEVEL
(NOT CONNECTED TO A PIN)
EDGE
INPUT
(TCAP)
Because the timer has a 16-bit architecture, each specific functional segment (capability) is represented
by two registers. These registers contain the high byte and low byte of that functional segment. Generally,
accessing the low byte of a specific timer function allows full control of that function; however, an access
of the high byte inhibits that specific timer function until the low byte is accessed also.
NOTE
The I bit in the condition code register (CCR) should be set while
manipulating both the high byte and low byte register of a specific timer
function to ensure that an interrupt does not occur.
MC68HC05L16 • MC68HC705L16 Data Sheet, Rev. 4.1
78
Freescale Semiconductor