MC68HC05P18 Datasheet, PDF (72/144 Pages) Freescale Semiconductor, Inc – Advance Information

EEPROM
Freescale Semiconductor, Inc.
8.3 EEPROM Programming Register
The contents and use of the programming register are discussed here.
Address: $001C
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
CPEN
Write:
ER1
ER0 LATCH EERC EEPGM
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 8-1. EEPROM Programming Register (EEPROG)
CPEN — Charge Pump Enable Bit
When set, CPEN enables the charge pump which produces the
internal EEPROM programming voltage. This bit should be set
concurrently with the LATCH bit. The programming voltage will not be
available until EEPGM is set. The charge pump should be disabled
when not in use. CPEN is readable and writable and is cleared by
reset.
ER1 and ER0 — Erase Select Bits
ER1 and ER0 form a 2-bit field which is used to select one of three
erase modes: byte, block, or bulk. Table 8-1 shows the modes
selected for each bit configuration. These bits are readable and
writable and are cleared by reset.
Table 8-1. Erase Mode Select
ER1
ER0
0
0
0
1
1
0
1
1
Mode
Program (no erase)
Byte erase
Block erase
Bulk erase
Advance Information
72
MC68HC(8)05P18 — Rev. 2.0
EEPROM
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