MC68HC05P18 Datasheet, PDF (31/144 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Memory
Input/Output and Control Registers
Addr.
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$000A
Register Name
Bit 7
6
Port A Data Register ^Read: _PA7
PA6
(PORTA) Write:
See page 64. _Reset:
Port B Data Register ^Read: _PB7
PB6
(PORTB) Write:
See page 65. _Reset:
Port C Data Register ^Read: _PC7
PC6
(PORTC) Write:
See page 66. _Reset:
Port D Data Register ^{Read: PD7}
0
(PORTD) Write:
See page 67. _Reset:
Port A Data Direction
Read:
DDRA7
(DDRA) Write:
See page 64. _{Reset: 0}
DDRA6
0
Port B Data Direction
Read:
DDRB7
(DDRB) Write:
See page 65. _{Reset: 0}
DDRB6
0
Port C Data Direction
Read:
DDRC7
(DDRC) Write:
See page 66. _{Reset: 0}
DDRC6
0
Port D Data Direction ^{Read: 0}
0
(DDRD) Write:
See page 67. _{Reset: 0}
0
Unimplemented
5
PA5
PB5
PC5
PD5
DDRA5
0
DDRB5
0
DDRC5
0
DDRD5
0
4
3
PA4
PA3
Unaffected by reset
0
0
Unaffected by reset
PC4
PC3
Unaffected by reset
1
0
Unaffected by reset
DDRA4 DDRA3
0
0
1
1
0
0
DDRC4 DDRC3
0
0
0
0
0
0
2
1
Bit 0
PA2 PA1 PA0
0
0
0
PC2 PC1 PC0
0
0
0
DDRA2 DDRA1 DDRA0
0
0
0
1
1
1
0
0
0
DDRC2 DDRC1 DDRC0
0
0
0
0
0
0
0
0
0
Unimplemented
SIOP Control Register ^{Read: 0}
SPE
0
(SCR) Write:
See page 102. _{Reset: 0}
0
0
= Unimplemented
0
0
MSTR
0
0
0
R = Reserved
Figure 2-4. I/O and Control Registers (Sheet 1 of 3)
0
0
0
0
U = Unaffected
MC68HC(8)05P18 — Rev. 2.0
MOTOROLA
Memory
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Go to: www.freescale.com
Advance Information
31