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MC68HC05P18 Datasheet, PDF (128/144 Pages) Freescale Semiconductor, Inc – Advance Information
Freescale Semiconductor, Inc.
Electrical Specifications
13.10 SIOP Timing
Number
Characteristic(1)
Symbol
Min
Operating frequency(2)
Master
Slave
fSIOP(M)
1
fSIOP(S)
dc
Cycle time
1
Master
Slave
2
SCK low time(3)
tSCK(M)
1
tSCK(S)
—
tCYC
238
3
SDO data valid time
4
SDO hold time
5
SDI setup time
6
SDI hold time
tv
—
tHO
0
tS
100
tH
100
1. VDD = 4.5 Vdc ± 10%, VSS = 0 Vdc, TA = –40°C to +125°C, unless otherwise noted
2. fOP = fOSC ÷ 2; tCYC = 1 ÷ fOP
3. In master mode, the SCK rate is determined by the programmable option in MOR1.
Max
1
1
1
1
—
200
—
—
—
Unit
fOP
tCYC
ns
ns
ns
ns
ns
SCK
SDI
t3
SDI
t1
t2
SDI
t4
SDI
t5
t6
SDI
SDI
SDI
BIT 7
Figure 13-1. SIOP Timing Diagram
Advance Information
128
MC68HC(8)05P18 — Rev. 2.0
Electrical Specifications
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