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MC68HC05P18 Datasheet, PDF (41/144 Pages) Freescale Semiconductor, Inc – Advance Information
Freescale Semiconductor, Inc.
Advance Information — MC68HC05P18/MC68HC805P18
Section 4. Interrupts
4.1 Contents
4.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
4.3 Interrupt Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
4.3.1 Reset Interrupt Sequence . . . . . . . . . . . . . . . . . . . . . . . . . .43
4.3.2 Software Interrupt (SWI). . . . . . . . . . . . . . . . . . . . . . . . . . . .43
4.3.3 Hardware Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
4.3.3.1
4.3.3.2
4.3.3.3
External Interrupt (IRQ) . . . . . . . . . . . . . . . . . . . . . . . . . .45
Optional External Interrupts (PA0–PA7) . . . . . . . . . . . . .46
Input Capture Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . .47
4.3.3.4
4.3.3.5
Output Compare Interrupt . . . . . . . . . . . . . . . . . . . . . . . .47
Timer Overflow Interrupt . . . . . . . . . . . . . . . . . . . . . . . . .47
4.2 Introduction
The MCUs can be interrupted six different ways:
• Non-maskable software interrupt instruction (SWI)
• External asynchronous interrupt (IRQ)
• Input capture interrupt (TIMER)
• Output compare interrupt (TIMER)
• Timer overflow interrupt (TIMER)
• Port A interrupt (if selected via MOR2, bits 0–7)
Interrupts cause the processor to save the register contents on the stack
and to set the interrupt mask (I bit) to prevent additional interrupts. Unlike
reset, hardware interrupts do not cause the current instruction execution
to be halted, but are considered pending until the current instruction is
completed.
MC68HC(8)05P18 — Rev. 2.0
MOTOROLA
Interrupts
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Advance Information
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