MC68HC05P18 Datasheet, PDF (126/144 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
Electrical Specifications
13.7 DC Electrical Characteristics
Characteristic⁽¹⁾
Output voltage
I_Load = 10.0 µA
Output high voltage
I_Load = –0.8 mA: PA0–PA7, PB5–PB7, PC2–PC7, PD5/CKOUT
I_Load = –5 mA: PC0, PC1
Output low voltage
I_Load = 1.6 mA: PA0–PA7, PB5–PB7, PC2–PC7, PD5/CKOUT
I_Load = 10 mA: PC0, PC1
Input high voltage
PA0–PA7, PB5–PB7, PC0–PC7, PD5/CKOUT, TCAP/PD7, IRQ,
RESET, OSC1
Input low voltage
PA0–PA7, PB5–PB7, PC0–PC7, PD5, TCAP/PD7, IRQ, RESET,
OSC1
Supply current^{(2) (3) (4) (5) (6) (7)}
Low frequency (2-MHz bus)
Run
Wait (A2D on)
Wait (A2D off)
High frequency (4-MHz bus) MC68HC05P18 only
Run
Wait (A2D on)
Wait (A2D off)
Stop (–40°C to +132°C)
Stop LVR disabled
Stop LVR enabled
I/O ports hi-z leakage current
PA0–PA7, PB5–PB7, PC0–PC7, PD5/CKOUT, TCAP/PD7
I/O ports switch resistance (pullup enabled PA0–PA7)
A/D ports hi-z leakage current
PC3–PC7
Input current
RESET, IRQ, OSC1
Capacitance
Ports (as input or output)
RESET, IRQ
EEPROM program/erase time (128 byte array)
Byte
Block (erase only)
Bulk (erase only)
Low-voltage reset voltage
Symbol
V_OL
V_OH
V_OH
V_OL
V_IH
V_IL
I_DD
I_IL
R_PTA
I_IL
I_IN
C_Out
C_In
—
—
Min
—
V_DD –0.1
V_DD –0.8
—
0.7 x V_DD
V_SS
—
—
—
—
—
—
—
—
—
7
—
—
—
—
—
—
—
3.5
Max
0.1
—
—
0.4
V_DD
0.2 x V_DD
4
3.5
2.5
6
4.5
3.5
50
200
±10
30
±1
±1
12
8
5
15
50
4.3
1. V_DD = 5.0 Vdc ± 10%, V_SS = 0 Vdc, T_A = –40°C to +125°C, all values shown reflect average measurements.
2. Run (operating) I_DD, wait I_DD: Measured using external square wave clock source (f_osc = 4.2 MHz), all inputs
0.2 V from rail; no dc loads, less than 50 pF on all outputs, C_L = 20 pF on OSC2
3. Wait I_DD with active systems: timer, SIOP, and A/D. Wait I_DD is affected linearly by the OSC2 capacitance.
4. Wait, stop I_DD: All ports configured as inputs, V_IL = 0.2 V, V_IH = V_DD –0.2 V
5. Stop I_DD measured with OSC1 = V_SS. Stop I_DD maximum values given with LVR option enabled.
6. Run and wait I_DD limit values are with no load on PD5 clock out, when PD5 is enabled.
7. Run and wait I_DD values are for both PD5 enabled and disabled and LVR enabled and disabled.
Unit
V
V
V
V
V
mA
mA
mA
mA
mA
mA
µA
µA
µA
k
µA
µA
pF
ms
V
Advance Information
126
MC68HC(8)05P18 — Rev. 2.0
Electrical Specifications
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