MC68HC05P18 Datasheet, PDF (24/144 Pages) Freescale Semiconductor, Inc – Advance Information

Freescale Semiconductor, Inc.
General Description
1.5.6 Port B (PB5/SDO, PB6/SDI, and PB7/SCK)
These three I/O pins comprise port B and are shared with the SIOP
communications subsystem. The state of any pin is software
programmable and all port B lines are configured as inputs during
power-on or reset. For further information, refer to Section 7.
Input/Output (I/O) Ports and Section 11. Serial Input/Output Port
(SIOP).
1.5.7 Port C (PC0–PC2, PC3/AD3, PC4/AD2, PC5/AD1, PC6/AD0, and PC7/V_REFH)
These eight I/O pins comprise port C and are shared with the A/D
converter subsystem. The state of any pin is software programmable
and all port C lines are configured as inputs during power-on or reset.
Port pins PC0 and PC1 are capable of sourcing and sinking high
currents. For further information, refer to Section 7. Input/Output (I/O)
Ports and Section 9. Analog-to-Digital (A/D) Converter.
1.5.8 Port D (PD5/CKOUT and PD7/TCAP)
These two I/O pins comprise port D, and one of them is shared with the
16-bit timer subsystem. Unless clock output has been selected, the state
of PD5/CKOUT is software programmable and is configured as an input
during power-on or reset. PD7 is always an input; it may be read at any
time, regardless of the mode of operation the 16-bit timer may be in. For
further information, refer to Section 7. Input/Output (I/O) Ports and
Section 10. 16-Bit Timer.
For the MC68HC05P18, there is a mask option to turn the PD5/CKOUT
pin into a clock output. The clock output is a buffered OSC2 signal with
a CMOS output drive. The clock output or the port D function must be
chosen with the mask option and is not alterable in software.
For the MC68HC805P18, the PD5/CKOUT pin can be turned into a clock
output pin by programming mask option register 1 (MOR1). The clock
output is a buffered OSC2 signal with a CMOS output driver.
Advance Information
24
MC68HC(8)05P18 — Rev. 2.0
General Description
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