MC68HC05P18 Datasheet, PDF (32/144 Pages) Freescale Semiconductor, Inc – Advance Information

Memory
Freescale Semiconductor, Inc.
Addr.
$000B
$000C
$000D
Register Name
Bit 7
SIOP Status Register ^{Read: SPIF}
(SSR) Write:
See page 104. _{Reset: 0}
SIOP Data Register ^Read:
(SDR) Write:
See page 105. _Reset:
SDR7
Unimplemented
6
DCOL
0
SDR6
5
0
0
SDR5
4
3
2
1
Bit 0
0
0
0
0
0
0
0
0
0
0
SDR4 SDR3 SDR2 SDR1 SDR0
Unaffected by reset
$000E
Unimplemented
$000F
Unimplemented
$0010
Unimplemented
$0011
Reserved
R
R
R
R
R
R
R
R
$0012
$0013
$0014
$0015
$0016
Timer Control Register ^Read: _{ICIE OCIE TOIE}
(TCR) Write:
See page 94. _{Reset: 0}
0
0
Timer Status Register ^{Read: ICF}
OCF
TOF
(TSR) Write:
See page 96. _{Reset: U}
U
U
Input Capture MSB Register ^{Read: ICRH7}
(ICRH) Write:
See page 93. _Reset:
ICRH6
ICRH5
Input Capture LSB Register ^{Read: ICRL7}
(ICRL) Write:
See page 93. _Reset:
ICRL6
ICRL5
Output Compare MSB ^{Read: OCRH7}
Register (OCRH) Write:
See page 90. _Reset:
OCRH6
OCRH5
= Unimplemented
0
0
0
IEDG OLVL
0
0
0
0
0
0
0
0
0
0
0
ICRH4
0
ICRH3
0
0
0
ICRH2 ICRH1 ICRH0
Unaffected by reset
ICRL4 ICRL3
ICRL2
ICRL1 ICRL0
Unaffected by reset
OCRH4 OCRH3 OCRH2 OCRH1 OCRH0
Unaffected by reset
R = Reserved
U = Unaffected
Figure 2-4. I/O and Control Registers (Sheet 2 of 3)
Advance Information
32
MC68HC(8)05P18 — Rev. 2.0
Memory
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