MC68HC05P18 Datasheet, PDF (67/144 Pages) Freescale Semiconductor, Inc – Advance Information

7.6 Port D
Freescale Semiconductor, Inc.
Input/Output (I/O) Ports
Port D
Port D is a 2-bit port with one bidirectional pin (PD5/CKOUT) and one
input-only pin (PD7). Pin PD7 is shared with the 16-bit timer. PD5 can be
replaced with a buffered OSC2 clock output via MOR1. The port D data
register is located at address $0003 and its data direction register (DDR)
is located at address $0007. Reset does not affect the data registers, but
clears the DDRs, thereby setting PD5/CKOUT to input mode. Writing a
1 to DDR bit 5 sets PD5/CKOUT to output mode (see Figure 7-4).
Port D may be used for general I/O applications regardless of the state
of the 16-bit timer. Since PD7 is an input-only line, its state can be read
from the port D data register at any time.
READ $0007
WRITE $0007
RESET
WRITE $0003 ^(RST)
READ $0003
DATA DIRECTION
REGISTER BIT
DATA
REGISTER BIT
OUTPUT
I/O
PIN
INTERNAL
HC05
DATA BUS
Figure 7-4. Port D I/O Circuitry
MC68HC(8)05P18 — Rev. 2.0
MOTOROLA
Input/Output (I/O) Ports
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Advance Information
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